Samsung electronics co., ltd. (20240096820). METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE USING SACRIFICIAL LAYER AND SEMICONDUCTOR PACKAGE MANUFACTURED BY USING THEREOF simplified abstract
Contents
- 1 METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE USING SACRIFICIAL LAYER AND SEMICONDUCTOR PACKAGE MANUFACTURED BY USING THEREOF
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE USING SACRIFICIAL LAYER AND SEMICONDUCTOR PACKAGE MANUFACTURED BY USING THEREOF - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Original Abstract Submitted
METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE USING SACRIFICIAL LAYER AND SEMICONDUCTOR PACKAGE MANUFACTURED BY USING THEREOF
Organization Name
Inventor(s)
Young Lyong Kim of Suwon-si (KR)
Hyun Soo Chung of Suwon-si (KR)
METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE USING SACRIFICIAL LAYER AND SEMICONDUCTOR PACKAGE MANUFACTURED BY USING THEREOF - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240096820 titled 'METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE USING SACRIFICIAL LAYER AND SEMICONDUCTOR PACKAGE MANUFACTURED BY USING THEREOF
Simplified Explanation
The method for manufacturing a semiconductor package involves mounting semiconductor chips on an interposer, forming a molding part between the chips, surrounding bumps with underfill, forming sacrificial and wafer level molding layers, planarizing the layers, removing sacrificial pattern, sawing the package, mounting the interposer on a package board, surrounding bumps with underfill, and attaching a stiffener to the board.
- Mount semiconductor chips on an interposer
- Form molding part between semiconductor chips
- Surround bumps with first underfill
- Form sacrificial layer covering chips
- Form wafer level molding layer covering sacrificial layer
- Planarize to expose upper sides of chips
- Form sacrificial pattern and wafer level molding pattern
- Remove sacrificial pattern
- Saw off outer edge of semiconductor package
- Mount interposer on package board
- Surround bumps with second underfill
- Attach stiffener to outer portion of package board
Potential Applications
This technology can be used in the manufacturing of advanced semiconductor packages for various electronic devices such as smartphones, tablets, and computers.
Problems Solved
This method solves the problem of efficiently and effectively packaging semiconductor chips in a compact and durable manner, ensuring proper functionality and reliability of electronic devices.
Benefits
The benefits of this technology include improved thermal management, increased durability, enhanced electrical performance, and overall cost-effectiveness in semiconductor packaging processes.
Potential Commercial Applications
The potential commercial applications of this technology include the semiconductor industry, electronics manufacturing companies, and consumer electronics companies looking to enhance the performance and reliability of their products.
Possible Prior Art
One possible prior art in semiconductor packaging is the use of flip chip technology, which involves mounting semiconductor chips directly onto a substrate without the need for wire bonding. This method offers improved electrical performance and thermal management compared to traditional packaging methods.
Unanswered Questions
How does this method compare to traditional semiconductor packaging techniques?
This article does not provide a direct comparison between this method and traditional semiconductor packaging techniques. It would be helpful to understand the specific advantages and disadvantages of this new method in comparison to existing practices.
What are the specific electronic devices that can benefit from this advanced semiconductor packaging technology?
The article does not specify the electronic devices that can benefit from this technology. It would be interesting to explore the potential applications in different industries and products.
Original Abstract Submitted
a method for manufacturing a semiconductor package includes mounting semiconductor chips on an interposer, forming a molding part between the semiconductor chips, surrounding a plurality of bumps between the semiconductor chips and the interposer with a first underfill, forming a sacrificial layer that covers the semiconductor chips, forming a wafer level molding layer that covers the sacrificial layer, performing a planarization process to expose upper sides of the semiconductor chips, form the sacrificial layer into a sacrificial pattern, and form the wafer level molding layer into a wafer level molding pattern, removing the sacrificial pattern, performing a sawing process to remove an outer edge of the semiconductor package, mounting the interposer on a side of a package board, surrounding a plurality of bumps between the package board and the interposer with a second underfill, and attaching a stiffener to an outer portion of the package board.
