Samsung electronics co., ltd. (20240096717). SEMICONDUCTOR PACKAGE simplified abstract
Contents
- 1 SEMICONDUCTOR PACKAGE
SEMICONDUCTOR PACKAGE
Organization Name
Inventor(s)
SEUNGDUK Baek of Suwon-si (KR)
SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240096717 titled 'SEMICONDUCTOR PACKAGE
Simplified Explanation
The semiconductor package described in the abstract includes two semiconductor chips bonded together, allowing their test patterns to face each other. The test patterns consist of in-pads, out-pads, and connection pads that are connected in series to form a wiring pattern.
- The semiconductor package includes two semiconductor chips bonded together.
- The test patterns on each chip consist of in-pads, out-pads, and connection pads.
- The connection pads are connected in series to form a wiring pattern.
Potential Applications
This technology could be applied in the semiconductor industry for testing and quality control purposes.
Problems Solved
This technology solves the problem of efficiently connecting test patterns on different semiconductor chips.
Benefits
The benefits of this technology include improved testing capabilities and enhanced quality control in semiconductor manufacturing.
Potential Commercial Applications
The potential commercial applications of this technology could be in the production of semiconductor devices for various electronic products.
Possible Prior Art
One possible prior art could be the use of test patterns in semiconductor packaging for testing purposes.
Unanswered Questions
How does this technology impact the overall performance of semiconductor devices?
This article does not provide information on how the described technology may affect the performance of semiconductor devices. Further research or testing may be needed to determine the impact.
What are the cost implications of implementing this technology in semiconductor manufacturing processes?
The article does not address the cost implications of implementing this technology. Understanding the cost-effectiveness of this innovation would be crucial for its adoption in the industry.
Original Abstract Submitted
a semiconductor package includes a first semiconductor chip on a substrate and including a first semiconductor substrate and a first test pattern on a first surface of the first semiconductor substrate, and a second semiconductor chip on the first semiconductor chip and including a second semiconductor substrate and a second test pattern on a second surface of the second semiconductor substrate. the first and second semiconductor chips bonded to allow the first test pattern to face the second test pattern. the first test pattern includes a first in-pad, first connection pads, and a first out-pad. the second test pattern includes a second in-pad bonded to the first in-pad, a second out-pad bonded to the first out-pad, and second connection pads bonded to the first connection pads. the first and second connection pads are connected in series to alternately connect with each other and form a series wiring pattern, so that each first connection pad connects to another first connection pad in one direction along the series wiring pattern and to a second connection pad in an opposite direction along the series wiring pattern.
