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| − | '''Summary of the patent applications from SK hynix Inc. on November 30th, 2023'''
| + | ==Patent applications for sk hynix on November 30th, 2023== |
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| − | SK hynix Inc. has recently filed several patents related to resistive memory devices, semiconductor memory devices, memory device manufacturing methods, and semiconductor device fabrication methods. These patents aim to improve the performance, efficiency, and reliability of memory devices and semiconductor devices.
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| − | Summary:
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| − | - SK hynix Inc. has filed patents for resistive memory devices with stack structures and slit structures, which are designed to improve memory block division and organization.
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| − | - They have also filed patents for memory devices with stacked gate lines, main plugs, and plug separation patterns, which aim to enhance the structure and functionality of memory devices.
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| − | - Additionally, SK hynix Inc. has filed patents for semiconductor memory devices with gate stacks, channel structures, core insulating layers, and barrier layers, which aim to improve the performance and efficiency of memory devices.
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| − | - They have also filed patents for semiconductor memory devices with multiple stack structures, vertical structures, memory layers, channel patterns, and bit line contact structures, which aim to enhance the functionality and design of memory devices.
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| − | - SK hynix Inc. has filed patents for methods of fabricating semiconductor devices, including the formation of sacrificial pads, etch target layers, openings, pillars, isolation trenches, and pad-type recesses, which aim to improve the fabrication process and structure of semiconductor devices.
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| − | - They have also filed patents for electronic circuit board designs with multiple conductor layers, signal transmission pads, mesh structures, voids, and improved signal transmission and reception capabilities.
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| − | - SK hynix Inc. has filed a patent for a controller with a storage memory, decoder, and processing circuit, which aims to improve the reliability of data decoding in a controller.
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| − | - They have also filed a patent for a semiconductor wafer with chip sealing regions, scribe lane regions, chip guards, test circuit patterns, ground lines, and ground wiring layers, which aim to protect and test the chips on the wafer effectively.
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| − | - Notable applications include resistive memory devices, semiconductor memory devices, memory device manufacturing methods, semiconductor device fabrication methods, electronic circuit board designs, and storage system designs.
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| − | Notable Applications:
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| − | * Resistive memory devices with stack structures and slit structures.
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| − | * Memory devices with stacked gate lines, main plugs, and plug separation patterns.
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| − | * Semiconductor memory devices with gate stacks, channel structures, core insulating layers, and barrier layers.
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| − | * Semiconductor memory devices with multiple stack structures, vertical structures, memory layers, channel patterns, and bit line contact structures.
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| − | * Methods of fabricating semiconductor devices, including sacrificial pads, etch target layers, openings, pillars, isolation trenches, and pad-type recesses.
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| − | * Electronic circuit board designs with multiple conductor layers, signal transmission pads, mesh structures, and voids.
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| − | * Controllers with storage memory, decoders, and processing circuits.
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| − | * Semiconductor wafers with chip sealing regions, scribe lane regions, chip guards, test circuit patterns, ground lines, and ground wiring layers.
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| − | * Storage systems with decoupling devices and unit capacitors.
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| − | ==Patent applications for SK hynix Inc. on November 30th, 2023== | |
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| − | ===WAFER TEST SYSTEM AND OPERATING METHOD THEREOF ([[US Patent Application 18052538. WAFER TEST SYSTEM AND OPERATING METHOD THEREOF simplified abstract (SK hynix Inc.)|18052538]])===
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| − | '''Main Inventor'''
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| − | | |
| − | Dong Kil KIM
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| − | | |
| − | ===TEST CIRCUIT OF ELECTRONIC DEVICE, ELECTRONIC DEVICE INCLUDING TEST CIRCUIT, AND OPERATING METHOD THEREOF ([[US Patent Application 17990119. TEST CIRCUIT OF ELECTRONIC DEVICE, ELECTRONIC DEVICE INCLUDING TEST CIRCUIT, AND OPERATING METHOD THEREOF simplified abstract (SK hynix Inc.)|17990119]])===
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| − | '''Main Inventor'''
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| − | | |
| − | Ki Hyuk SUNG
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| − | | |
| − | ===POWER SUPPLY APPARATUS AND METHOD AND STORAGE SYSTEM INCLUDING THE SAME ([[US Patent Application 18073676. POWER SUPPLY APPARATUS AND METHOD AND STORAGE SYSTEM INCLUDING THE SAME simplified abstract (SK hynix Inc.)|18073676]])===
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| − | '''Main Inventor'''
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| − | | |
| − | Woong Sik SHIN
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| − | | |
| − | | |
| − | ===STORAGE DEVICE, ELECTRONIC DEVICE INCLUDING STORAGE DEVICE, AND OPERATING METHOD THEREOF ([[US Patent Application 17978522. STORAGE DEVICE, ELECTRONIC DEVICE INCLUDING STORAGE DEVICE, AND OPERATING METHOD THEREOF simplified abstract (SK hynix Inc.)|17978522]])===
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| − | '''Main Inventor'''
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| − | Byoung Min JIN
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| − | | |
| − | ===MEMORY CONTROLLER AND METHOD OF OPERATING THE SAME ([[US Patent Application 18081605. MEMORY CONTROLLER AND METHOD OF OPERATING THE SAME simplified abstract (SK hynix Inc.)|18081605]])===
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| − | '''Main Inventor'''
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| − | Seon Ju LEE
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| − | | |
| − | ===MEMORY AND OPERATION METHOD THEREOF ([[US Patent Application 17980141. MEMORY AND OPERATION METHOD THEREOF simplified abstract (SK hynix Inc.)|17980141]])===
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| − | '''Main Inventor'''
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| − | Sang Woo YOON
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| − | | |
| − | ===STORAGE DEVICE AND OPERATING METHOD THEREOF ([[US Patent Application 17987131. STORAGE DEVICE AND OPERATING METHOD THEREOF simplified abstract (SK hynix Inc.)|17987131]])===
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| − | '''Main Inventor'''
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| − | Ji Hoon HWANG
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| − | ===MEMORY SYSTEM FOR CONTROLLING OPERATING SPEED AND DATA PROCESSING SYSTEM INCLUDING THE SAME ([[US Patent Application 17981653. MEMORY SYSTEM FOR CONTROLLING OPERATING SPEED AND DATA PROCESSING SYSTEM INCLUDING THE SAME simplified abstract (SK hynix Inc.)|17981653]])===
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| − | '''Main Inventor'''
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| − | Youn Won PARK
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| − | ===PERIPHERAL COMPONENT INTERCONNECT EXPRESS INTERFACE DEVICE AND SYSTEM INCLUDING THE SAME ([[US Patent Application 18446489. PERIPHERAL COMPONENT INTERCONNECT EXPRESS INTERFACE DEVICE AND SYSTEM INCLUDING THE SAME simplified abstract (SK hynix Inc.)|18446489]])===
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| − | '''Main Inventor'''
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| − | Yong Tae JEON
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| − | ===CONTROLLER AND METHOD OF OPERATING THE SAME ([[US Patent Application 17994908. CONTROLLER AND METHOD OF OPERATING THE SAME simplified abstract (SK hynix Inc.)|17994908]])===
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| − | '''Main Inventor'''
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| − | | |
| − | Jung Ae KIM
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| − | ===MEMORY SYSTEM, MEMORY CONTROLLER AND OPERATING METHOD THEREOF FOR DETERMINING GARBAGE COLLECTION VICTIM BLOCK ([[US Patent Application 17937334. MEMORY SYSTEM, MEMORY CONTROLLER AND OPERATING METHOD THEREOF FOR DETERMINING GARBAGE COLLECTION VICTIM BLOCK simplified abstract (SK hynix Inc.)|17937334]])===
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| − | '''Main Inventor'''
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| − | | |
| − | Jung Woo KIM
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| − | | |
| − | ===CONTROLLER AND METHOD OF OPERATING THE SAME ([[US Patent Application 17983613. CONTROLLER AND METHOD OF OPERATING THE SAME simplified abstract (SK hynix Inc.)|17983613]])===
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| − | '''Main Inventor'''
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| − | Myung Jin Jo
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| − | ===DATA PROCESSING SYSTEM, OPERATING METHOD OF THE DATA PROCESSING SYSTEM, AND COMPUTING SYSTEM USING THE DATA PROCESSING SYSTEM AND OPERATING METHOD OF THE DATA PROCESSING SYSTEM ([[US Patent Application 18077932. DATA PROCESSING SYSTEM, OPERATING METHOD OF THE DATA PROCESSING SYSTEM, AND COMPUTING SYSTEM USING THE DATA PROCESSING SYSTEM AND OPERATING METHOD OF THE DATA PROCESSING SYSTEM simplified abstract (SK hynix Inc.)|18077932]])===
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| − | '''Main Inventor'''
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| − | Seok Min LEE
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| − | ===SEMICONDUCTOR DEVICES AND SEMICONDUCTOR SYSTEMS CALIBRATING TERMINATION RESISTANCE ([[US Patent Application 18449252. SEMICONDUCTOR DEVICES AND SEMICONDUCTOR SYSTEMS CALIBRATING TERMINATION RESISTANCE simplified abstract (SK hynix Inc.)|18449252]])===
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| − | '''Main Inventor'''
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| − | Sang Sic YOON
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| − | ===SEMICONDUCTOR DEVICE FOR PERFORMING DATA ALIGNMENT OPERATION ([[US Patent Application 17952008. SEMICONDUCTOR DEVICE FOR PERFORMING DATA ALIGNMENT OPERATION simplified abstract (SK hynix Inc.)|17952008]])===
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| − | '''Main Inventor'''
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| − | Young Mok JEONG
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| − | ===APPARATUS FOR EVICTING COLD DATA FROM VOLATILE MEMORY DEVICE ([[US Patent Application 17970103. APPARATUS FOR EVICTING COLD DATA FROM VOLATILE MEMORY DEVICE simplified abstract (SK hynix Inc.)|17970103]])===
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| − | '''Main Inventor'''
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| − | Hyeong Tak JI
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| − | ===SEMICONDUCTOR MEMORY DEVICE AND CONTROLLER FOR READING DATA WITH IMPROVED SPEED, AND METHOD OF OPERATING THE SEMICONDUCTOR MEMORY DEVICE AND THE CONTROLLER ([[US Patent Application 17962694. SEMICONDUCTOR MEMORY DEVICE AND CONTROLLER FOR READING DATA WITH IMPROVED SPEED, AND METHOD OF OPERATING THE SEMICONDUCTOR MEMORY DEVICE AND THE CONTROLLER simplified abstract (SK hynix Inc.)|17962694]])===
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| − | '''Main Inventor'''
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| − | Sung Ho AHN
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| − | ===MEMORY DEVICE AND OPERATING METHOD OF THE MEMORY DEVICE ([[US Patent Application 17986628. MEMORY DEVICE AND OPERATING METHOD OF THE MEMORY DEVICE simplified abstract (SK hynix Inc.)|17986628]])===
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| − | '''Main Inventor'''
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| − | Hee Youl LEE
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| − | ===MEMORY CONTROLLER AND OPERATING METHOD THEREOF ([[US Patent Application 18060437. MEMORY CONTROLLER AND OPERATING METHOD THEREOF simplified abstract (SK hynix Inc.)|18060437]])===
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| − | '''Main Inventor'''
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| − | Seung Yeol LEE
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| − | ===METHODS OF FORMING PATTERNS USING HARD MASK ([[US Patent Application 18052813. METHODS OF FORMING PATTERNS USING HARD MASK simplified abstract (SK hynix Inc.)|18052813]])===
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| − | '''Main Inventor'''
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| − | Joo Hwan PARK
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| − | ===SEMICONDUCTOR CHIP INCLUDING THROUGH ELECTRODE, AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME ([[US Patent Application 18450216. SEMICONDUCTOR CHIP INCLUDING THROUGH ELECTRODE, AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME simplified abstract (SK hynix Inc.)|18450216]])===
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| − | '''Main Inventor'''
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| − | Seung Hwan KIM
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| − | ===STORAGE SYSTEM INCLUDING A DECOUPLING DEVICE HAVING A PLURALITY OF UNIT CAPACITORS ([[US Patent Application 18446959. STORAGE SYSTEM INCLUDING A DECOUPLING DEVICE HAVING A PLURALITY OF UNIT CAPACITORS simplified abstract (SK hynix Inc.)|18446959]])===
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| − | '''Main Inventor'''
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| − | Bok Kyu CHOI
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| − | ===SEMICONDUCTOR WAFER INCLUDING CHIP GUARD ([[US Patent Application 17978645. SEMICONDUCTOR WAFER INCLUDING CHIP GUARD simplified abstract (SK hynix Inc.)|17978645]])===
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| − | '''Main Inventor'''
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| − | | |
| − | Heon Yong Chang
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| − | ===CONTROLLER AND OPERATING METHOD THEREOF FOR DETERMINING RELIABILITY DATA BASED ON SYNDROME WEIGHT ([[US Patent Application 17960238. CONTROLLER AND OPERATING METHOD THEREOF FOR DETERMINING RELIABILITY DATA BASED ON SYNDROME WEIGHT simplified abstract (SK hynix Inc.)|17960238]])===
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| − | '''Main Inventor'''
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| − | Dae Sung KIM
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| − | ===CIRCUIT BOARD ([[US Patent Application 18073956. CIRCUIT BOARD simplified abstract (SK hynix Inc.)|18073956]])===
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| − | '''Main Inventor'''
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| − | Jae Hoon KO
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| − | ===SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME ([[US Patent Application 18073739. SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME simplified abstract (SK hynix Inc.)|18073739]])===
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| − | '''Main Inventor'''
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| − | | |
| − | Jun Ha KWAK
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| − | | |
| − | ===SEMICONDUCTOR MEMORY DEVICE ([[US Patent Application 17989937. SEMICONDUCTOR MEMORY DEVICE simplified abstract (SK hynix Inc.)|17989937]])===
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| − | '''Main Inventor'''
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| − | | |
| − | Kyu Jin CHOI
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| − | ===SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME ([[US Patent Application 17990064. SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME simplified abstract (SK hynix Inc.)|17990064]])===
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| − | '''Main Inventor'''
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| − | | |
| − | Jae Young OH
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| − | ===MEMORY DEVICE AND MANUFACTURING METHOD OF THE MEMORY DEVICE ([[US Patent Application 17991365. MEMORY DEVICE AND MANUFACTURING METHOD OF THE MEMORY DEVICE simplified abstract (SK hynix Inc.)|17991365]])===
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| − | '''Main Inventor'''
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| − | Byung In LEE
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| − | ===THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE ([[US Patent Application 18446776. THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE simplified abstract (SK hynix Inc.)|18446776]])===
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| − | '''Main Inventor'''
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| − | Min Jae HUR
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| − | ===RESISTIVE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME ([[US Patent Application 17988267. RESISTIVE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME simplified abstract (SK hynix Inc.)|17988267]])===
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| − | '''Main Inventor'''
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| − | | |
| − | In Ku KANG
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