SK hynix Inc. patent applications published on November 30th, 2023
Summary of the patent applications from SK hynix Inc. on November 30th, 2023
SK hynix Inc. has recently filed several patents related to resistive memory devices, semiconductor memory devices, memory device manufacturing methods, and semiconductor device fabrication methods. These patents aim to improve the performance, efficiency, and reliability of memory devices and semiconductor devices.
Summary: - SK hynix Inc. has filed patents for resistive memory devices with stack structures and slit structures, which are designed to improve memory block division and organization. - They have also filed patents for memory devices with stacked gate lines, main plugs, and plug separation patterns, which aim to enhance the structure and functionality of memory devices. - Additionally, SK hynix Inc. has filed patents for semiconductor memory devices with gate stacks, channel structures, core insulating layers, and barrier layers, which aim to improve the performance and efficiency of memory devices. - They have also filed patents for semiconductor memory devices with multiple stack structures, vertical structures, memory layers, channel patterns, and bit line contact structures, which aim to enhance the functionality and design of memory devices. - SK hynix Inc. has filed patents for methods of fabricating semiconductor devices, including the formation of sacrificial pads, etch target layers, openings, pillars, isolation trenches, and pad-type recesses, which aim to improve the fabrication process and structure of semiconductor devices. - They have also filed patents for electronic circuit board designs with multiple conductor layers, signal transmission pads, mesh structures, voids, and improved signal transmission and reception capabilities. - SK hynix Inc. has filed a patent for a controller with a storage memory, decoder, and processing circuit, which aims to improve the reliability of data decoding in a controller. - They have also filed a patent for a semiconductor wafer with chip sealing regions, scribe lane regions, chip guards, test circuit patterns, ground lines, and ground wiring layers, which aim to protect and test the chips on the wafer effectively. - Notable applications include resistive memory devices, semiconductor memory devices, memory device manufacturing methods, semiconductor device fabrication methods, electronic circuit board designs, and storage system designs.
Notable Applications:
- Resistive memory devices with stack structures and slit structures.
- Memory devices with stacked gate lines, main plugs, and plug separation patterns.
- Semiconductor memory devices with gate stacks, channel structures, core insulating layers, and barrier layers.
- Semiconductor memory devices with multiple stack structures, vertical structures, memory layers, channel patterns, and bit line contact structures.
- Methods of fabricating semiconductor devices, including sacrificial pads, etch target layers, openings, pillars, isolation trenches, and pad-type recesses.
- Electronic circuit board designs with multiple conductor layers, signal transmission pads, mesh structures, and voids.
- Controllers with storage memory, decoders, and processing circuits.
- Semiconductor wafers with chip sealing regions, scribe lane regions, chip guards, test circuit patterns, ground lines, and ground wiring layers.
- Storage systems with decoupling devices and unit capacitors.
Contents
- 1 Patent applications for SK hynix Inc. on November 30th, 2023
- 1.1 WAFER TEST SYSTEM AND OPERATING METHOD THEREOF (18052538)
- 1.2 TEST CIRCUIT OF ELECTRONIC DEVICE, ELECTRONIC DEVICE INCLUDING TEST CIRCUIT, AND OPERATING METHOD THEREOF (17990119)
- 1.3 POWER SUPPLY APPARATUS AND METHOD AND STORAGE SYSTEM INCLUDING THE SAME (18073676)
- 1.4 STORAGE DEVICE, ELECTRONIC DEVICE INCLUDING STORAGE DEVICE, AND OPERATING METHOD THEREOF (17978522)
- 1.5 MEMORY CONTROLLER AND METHOD OF OPERATING THE SAME (18081605)
- 1.6 MEMORY DEVICE AND OPERATING METHOD THEREOF (17976481)
- 1.7 MEMORY AND OPERATION METHOD THEREOF (17980141)
- 1.8 STORAGE DEVICE AND OPERATING METHOD THEREOF (17987131)
- 1.9 MEMORY SYSTEM FOR CONTROLLING OPERATING SPEED AND DATA PROCESSING SYSTEM INCLUDING THE SAME (17981653)
- 1.10 PERIPHERAL COMPONENT INTERCONNECT EXPRESS INTERFACE DEVICE AND SYSTEM INCLUDING THE SAME (18446489)
- 1.11 CONTROLLER AND METHOD OF OPERATING THE SAME (17994908)
- 1.12 MEMORY SYSTEM, MEMORY CONTROLLER AND OPERATING METHOD THEREOF FOR DETERMINING GARBAGE COLLECTION VICTIM BLOCK (17937334)
- 1.13 CONTROLLER AND METHOD OF OPERATING THE SAME (17983613)
- 1.14 DATA PROCESSING SYSTEM, OPERATING METHOD OF THE DATA PROCESSING SYSTEM, AND COMPUTING SYSTEM USING THE DATA PROCESSING SYSTEM AND OPERATING METHOD OF THE DATA PROCESSING SYSTEM (18077932)
- 1.15 SEMICONDUCTOR DEVICES AND SEMICONDUCTOR SYSTEMS CALIBRATING TERMINATION RESISTANCE (18449252)
- 1.16 SEMICONDUCTOR DEVICE FOR PERFORMING DATA ALIGNMENT OPERATION (17952008)
- 1.17 APPARATUS FOR EVICTING COLD DATA FROM VOLATILE MEMORY DEVICE (17970103)
- 1.18 SEMICONDUCTOR MEMORY DEVICE AND CONTROLLER FOR READING DATA WITH IMPROVED SPEED, AND METHOD OF OPERATING THE SEMICONDUCTOR MEMORY DEVICE AND THE CONTROLLER (17962694)
- 1.19 MEMORY DEVICE AND OPERATING METHOD OF THE MEMORY DEVICE (17986628)
- 1.20 MEMORY CONTROLLER AND OPERATING METHOD THEREOF (18060437)
- 1.21 METHODS OF FORMING PATTERNS USING HARD MASK (18052813)
- 1.22 SEMICONDUCTOR CHIP INCLUDING THROUGH ELECTRODE, AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME (18450216)
- 1.23 STORAGE SYSTEM INCLUDING A DECOUPLING DEVICE HAVING A PLURALITY OF UNIT CAPACITORS (18446959)
- 1.24 SEMICONDUCTOR WAFER INCLUDING CHIP GUARD (17978645)
- 1.25 CONTROLLER AND OPERATING METHOD THEREOF FOR DETERMINING RELIABILITY DATA BASED ON SYNDROME WEIGHT (17960238)
- 1.26 CIRCUIT BOARD (18073956)
- 1.27 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME (18073739)
- 1.28 SEMICONDUCTOR MEMORY DEVICE (17989937)
- 1.29 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME (17990064)
- 1.30 MEMORY DEVICE AND MANUFACTURING METHOD OF THE MEMORY DEVICE (17991365)
- 1.31 THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE (18446776)
- 1.32 RESISTIVE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME (17988267)
Patent applications for SK hynix Inc. on November 30th, 2023
WAFER TEST SYSTEM AND OPERATING METHOD THEREOF (18052538)
Main Inventor
Dong Kil KIM
TEST CIRCUIT OF ELECTRONIC DEVICE, ELECTRONIC DEVICE INCLUDING TEST CIRCUIT, AND OPERATING METHOD THEREOF (17990119)
Main Inventor
Ki Hyuk SUNG
POWER SUPPLY APPARATUS AND METHOD AND STORAGE SYSTEM INCLUDING THE SAME (18073676)
Main Inventor
Woong Sik SHIN
STORAGE DEVICE, ELECTRONIC DEVICE INCLUDING STORAGE DEVICE, AND OPERATING METHOD THEREOF (17978522)
Main Inventor
Byoung Min JIN
MEMORY CONTROLLER AND METHOD OF OPERATING THE SAME (18081605)
Main Inventor
Seon Ju LEE
MEMORY DEVICE AND OPERATING METHOD THEREOF (17976481)
Main Inventor
Gyeongcheol Park
MEMORY AND OPERATION METHOD THEREOF (17980141)
Main Inventor
Sang Woo YOON
STORAGE DEVICE AND OPERATING METHOD THEREOF (17987131)
Main Inventor
Ji Hoon HWANG
MEMORY SYSTEM FOR CONTROLLING OPERATING SPEED AND DATA PROCESSING SYSTEM INCLUDING THE SAME (17981653)
Main Inventor
Youn Won PARK
PERIPHERAL COMPONENT INTERCONNECT EXPRESS INTERFACE DEVICE AND SYSTEM INCLUDING THE SAME (18446489)
Main Inventor
Yong Tae JEON
CONTROLLER AND METHOD OF OPERATING THE SAME (17994908)
Main Inventor
Jung Ae KIM
MEMORY SYSTEM, MEMORY CONTROLLER AND OPERATING METHOD THEREOF FOR DETERMINING GARBAGE COLLECTION VICTIM BLOCK (17937334)
Main Inventor
Jung Woo KIM
CONTROLLER AND METHOD OF OPERATING THE SAME (17983613)
Main Inventor
Myung Jin Jo
DATA PROCESSING SYSTEM, OPERATING METHOD OF THE DATA PROCESSING SYSTEM, AND COMPUTING SYSTEM USING THE DATA PROCESSING SYSTEM AND OPERATING METHOD OF THE DATA PROCESSING SYSTEM (18077932)
Main Inventor
Seok Min LEE
SEMICONDUCTOR DEVICES AND SEMICONDUCTOR SYSTEMS CALIBRATING TERMINATION RESISTANCE (18449252)
Main Inventor
Sang Sic YOON
SEMICONDUCTOR DEVICE FOR PERFORMING DATA ALIGNMENT OPERATION (17952008)
Main Inventor
Young Mok JEONG
APPARATUS FOR EVICTING COLD DATA FROM VOLATILE MEMORY DEVICE (17970103)
Main Inventor
Hyeong Tak JI
SEMICONDUCTOR MEMORY DEVICE AND CONTROLLER FOR READING DATA WITH IMPROVED SPEED, AND METHOD OF OPERATING THE SEMICONDUCTOR MEMORY DEVICE AND THE CONTROLLER (17962694)
Main Inventor
Sung Ho AHN
MEMORY DEVICE AND OPERATING METHOD OF THE MEMORY DEVICE (17986628)
Main Inventor
Hee Youl LEE
MEMORY CONTROLLER AND OPERATING METHOD THEREOF (18060437)
Main Inventor
Seung Yeol LEE
METHODS OF FORMING PATTERNS USING HARD MASK (18052813)
Main Inventor
Joo Hwan PARK
SEMICONDUCTOR CHIP INCLUDING THROUGH ELECTRODE, AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME (18450216)
Main Inventor
Seung Hwan KIM
STORAGE SYSTEM INCLUDING A DECOUPLING DEVICE HAVING A PLURALITY OF UNIT CAPACITORS (18446959)
Main Inventor
Bok Kyu CHOI
SEMICONDUCTOR WAFER INCLUDING CHIP GUARD (17978645)
Main Inventor
Heon Yong Chang
CONTROLLER AND OPERATING METHOD THEREOF FOR DETERMINING RELIABILITY DATA BASED ON SYNDROME WEIGHT (17960238)
Main Inventor
Dae Sung KIM
CIRCUIT BOARD (18073956)
Main Inventor
Jae Hoon KO
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME (18073739)
Main Inventor
Jun Ha KWAK
SEMICONDUCTOR MEMORY DEVICE (17989937)
Main Inventor
Kyu Jin CHOI
SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME (17990064)
Main Inventor
Jae Young OH
MEMORY DEVICE AND MANUFACTURING METHOD OF THE MEMORY DEVICE (17991365)
Main Inventor
Byung In LEE
THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE (18446776)
Main Inventor
Min Jae HUR
RESISTIVE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME (17988267)
Main Inventor
In Ku KANG
