SIMD Operand Permutation with Selection from among Multiple Registers: abstract simplified (18299452)

• This abstract for appeared for patent application number 18299452 Titled 'SIMD Operand Permutation with Selection from among Multiple Registers'

Simplified Explanation

This abstract describes techniques for routing operands among SIMD pipelines. The apparatus includes multiple hardware pipelines that can execute a single-instruction multiple-data (SIMD) instruction for multiple threads simultaneously. The pipelines have execution circuitry to perform operations and routing circuitry to select input operands based on the instruction. The routing circuitry can choose between values from different architectural registers in thread-specific storage for different pipelines. Additionally, the routing circuitry can support a shift and fill instruction that allows storing a portion of a graphics frame in registers.

Original Abstract Submitted

Techniques are disclosed relating to operand routing among SIMD pipelines. In some embodiments, an apparatus includes a set of multiple hardware pipelines configured to execute a single-instruction multiple-data (SIMD) instruction for multiple threads in parallel, wherein the instruction specifies first and second architectural registers. In some embodiments, the pipelines include execution circuitry configured to perform operations using one or more pipeline stages of the pipeline. In some embodiments, the pipelines include routing circuitry configured to select, based on the instruction, a first input operand for the execution circuitry from among: a value from the first architectural register from thread-specific storage for another pipeline and a value from the second architectural register from thread-specific storage for a thread assigned to another pipeline. In some embodiments, the routing circuitry may support a shift and fill instruction that facilitates storage of an arbitrary portion of a graphics frame in one or more registers.