SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME: abstract simplified (18204505)

• This abstract for appeared for patent application number 18204505 Titled 'SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME'

Simplified Explanation

The abstract describes a semiconductor package that includes multiple layers to protect and enclose semiconductor chips. The package includes a substrate, a first semiconductor chip, an inner mold layer, an inner shielding layer, a second semiconductor chip stack, an outer mold layer, and an outer shielding layer. The inner and outer shielding layers are made of a conductive material and the inner shielding layer is connected to a ground pad on the substrate.

Original Abstract Submitted

A semiconductor package is disclosed. The semiconductor package may include a substrate, a first semiconductor chip on the substrate, an inner mold layer provided on the substrate to at least partially enclose the first semiconductor chip, an inner shielding layer provided on the substrate to at least partially enclose the inner mold layer, a second semiconductor chip stack on the inner shielding layer, an outer mold layer provided on the substrate to at least partially enclose the inner shielding layer and the second semiconductor chip stack, and an outer shielding layer at least partially enclosing the outer mold layer. Each of the inner and outer shielding layers may include a conductive material, and the inner shielding layer may be electrically connected to a ground pad of the substrate.