SEMICONDUCTOR DEVICE AND MASSIVE DATA STORAGE SYSTEM INCLUDING THE SAME: abstract simplified (18334546)

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  • This abstract for appeared for patent application number 18334546 Titled 'SEMICONDUCTOR DEVICE AND MASSIVE DATA STORAGE SYSTEM INCLUDING THE SAME'

Simplified Explanation

This abstract describes a semiconductor device that includes various components such as lower circuit patterns, lower bonding patterns, upper bonding patterns, a passive device, a gate electrode structure, a channel, and an upper substrate. The lower circuit patterns are located on a lower substrate and are electrically connected to the lower bonding patterns, which are made of a conductive material. The upper bonding patterns are on top of the lower bonding patterns and also made of a conductive material. The passive device is placed on the upper bonding patterns and is in contact with one of them. The gate electrode structure is positioned on the passive device and consists of gate electrodes that are spaced apart from each other in one direction and extend in another direction. The length of the gate electrodes in the second direction increases gradually from the bottom to the top in a stepwise manner. A channel is formed through at least a part of the gate electrode structure. Finally, an upper substrate is placed on top of the channel.


Original Abstract Submitted

A semiconductor device includes lower circuit patterns on a lower substrate; lower bonding patterns on the lower circuit patterns, the lower bonding patterns including a conductive material and being electrically connected to the lower circuit patterns; upper bonding patterns on and contacting the lower bonding patterns, and including a conductive material; a passive device on the upper bonding patterns, and including a conductive material and contacting one of the upper bonding patterns; a gate electrode structure on the passive device, and including gate electrodes spaced apart from each other in a first direction, each of which extends in a second direction, and extension lengths in the second direction of the gate electrodes increasing from a lowermost level toward an uppermost level in a stepwise manner; a channel extending through at least a portion of the gate electrode structure; and an upper substrate on the channel.