Qualcomm incorporated (20240106318). HIGH-SIDE N-TYPE POWER TRANSISTOR GATE DRIVING TECHNIQUES WITHOUT A BOOTSTRAP CAPACITOR simplified abstract
HIGH-SIDE N-TYPE POWER TRANSISTOR GATE DRIVING TECHNIQUES WITHOUT A BOOTSTRAP CAPACITOR
Organization Name
Inventor(s)
Taewoo Kwak of San Diego CA (US)
Joseph Dale Rutkowski of Chandler AZ (US)
HIGH-SIDE N-TYPE POWER TRANSISTOR GATE DRIVING TECHNIQUES WITHOUT A BOOTSTRAP CAPACITOR - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240106318 titled 'HIGH-SIDE N-TYPE POWER TRANSISTOR GATE DRIVING TECHNIQUES WITHOUT A BOOTSTRAP CAPACITOR
Simplified Explanation
The patent application describes techniques and apparatus for driving the gate of a high-side transistor in a switched-mode power supply (SMPS) circuit, such as an inverting buck-boost converter or a buck converter. One example technique involves a multi-step approach to pull down the gate voltage of the high-side transistor, including discharging the gate voltage to a lower level and using an auxiliary switch to completely turn off the transistor.
- High-side transistor gate driving technique:
* Multi-step approach to pull down gate voltage * Discharge gate voltage to lower level * Auxiliary switch to completely turn off transistor
Potential Applications: This technology can be applied in various switched-mode power supply circuits, such as inverting buck-boost converters or buck converters.
Problems Solved: This technology addresses the issue of efficiently driving the gate of a high-side transistor in SMPS circuits, ensuring proper operation and performance.
Benefits: Improved efficiency and performance in SMPS circuits, better control over the high-side transistor, and enhanced overall reliability.
Potential Commercial Applications: This technology can be utilized in various industries that rely on SMPS circuits, including electronics, telecommunications, automotive, and renewable energy.
Possible Prior Art: Prior art may include existing gate driving techniques for high-side transistors in SMPS circuits, such as simple gate driver circuits or more complex control methods.
Unanswered Questions: 1. How does this technology compare to other existing gate driving techniques for high-side transistors in SMPS circuits? 2. Are there any specific limitations or drawbacks to using the multi-step approach described in the patent application?
Original Abstract Submitted
techniques and apparatus for driving the gate of a high-side transistor in a switched-mode power supply (smps) circuit, such as an inverting buck-boost converter or a buck converter. one example technique to pull down the gate voltage of the high-side transistor involves a multi-step approach, in which the gate voltage is initially discharged to a lower voltage level, and once the gate voltage falls below a certain level, an auxiliary switch can take over to completely turn off the high-side transistor. one example smps circuit generally includes a high-side transistor, a pulldown gate driver having an output coupled to a gate of the high-side transistor, a pulse generator having an output coupled to an input of the pulldown gate driver, and a first switch coupled between the gate and a source of the high-side transistor.
