Qualcomm incorporated (20240105728). TRANSISTOR DEVICES WITH DOUBLE-SIDE CONTACTS AND STANDARD CELL simplified abstract

TRANSISTOR DEVICES WITH DOUBLE-SIDE CONTACTS AND STANDARD CELL

Organization Name

qualcomm incorporated

Inventor(s)

Qingqing Liang of San Diego CA (US)

Haining Yang of San Diego CA (US)

Jonghae Kim of San Diego CA (US)

Periannan Chidambaram of San Diego CA (US)

George Pete Imthurn of San Diego CA (US)

Jun Yuan of San Diego CA (US)

Giridhar Nallapati of San Diego CA (US)

Deepak Sharma of San Diego CA (US)

TRANSISTOR DEVICES WITH DOUBLE-SIDE CONTACTS AND STANDARD CELL - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240105728 titled 'TRANSISTOR DEVICES WITH DOUBLE-SIDE CONTACTS AND STANDARD CELL

Simplified Explanation

The patent application describes standard cells, transistors, and methods for fabricating the same. In one aspect, a transistor includes a drain and a source, each having silicide layers on both frontside and backside surfaces. The gate structure is positioned between the source and the drain, enclosing a channel recessed from the backside surfaces.

• Drain and source of transistor have silicide layers on frontside and backside surfaces.
• Gate structure separates source and drain, enclosing a channel recessed from backside surfaces.

Potential Applications

The technology described in the patent application could be applied in the semiconductor industry for the fabrication of transistors and standard cells used in integrated circuits.

Problems Solved

This technology solves the problem of optimizing transistor performance by improving the contact structures and channel design, leading to enhanced efficiency and functionality.

Benefits

The benefits of this technology include improved transistor performance, increased efficiency, and enhanced functionality in integrated circuits.

Potential Commercial Applications

The technology has potential commercial applications in the semiconductor industry for the production of advanced integrated circuits with optimized transistor designs.

Possible Prior Art

One possible prior art could be the use of silicide layers in transistor fabrication to improve contact resistance and overall performance. Another could be the integration of recessed channels for enhanced transistor efficiency.

How does this technology compare to existing transistor designs in terms of performance and efficiency?

This article does not provide a direct comparison with existing transistor designs to evaluate performance and efficiency differences.

What specific fabrication methods are used to implement the described transistor structure?

The article does not detail the specific fabrication methods employed to create the transistor structure with frontside and backside silicide layers.

Original Abstract Submitted

disclosed are standard cells, transistors, and methods for fabricating the same. in an aspect, a transistor includes a drain and a source each including a first drain/source silicide layer on a frontside surface of the drain/source and a second drain/source silicide layer on a backside surface of the drain/source. the first drain silicide layer is coupled to a first drain contact structure or the second drain silicide layer is coupled to a second drain contact structure. the first source silicide layer is coupled to a first source contact structure or the second source silicide layer is coupled to a second source contact structure. a gate structure is disposed between the source and the drain. a channel is at least partially enclosed by the gate structure and disposed between the source and the drain and is recessed from the backside surfaces of the source and drain.