NEXPERIA B.V. patent applications published on March 21st, 2024
Contents
- 1 Patent applications for NEXPERIA B.V. on March 21st, 2024
- 1.1 REDUCED STRESS CLIP FOR SEMICONDUCTOR DIE (18467786)
- 1.2 METHOD FOR MANUFACTURING A SEMICONDUCTOR PACKAGE ASSEMBLY AS WELL AS A SEMICONDUCTOR PACKAGE ASSEMBLY OBTAINED WITH THIS METHOD (18467779)
- 1.3 SEMICONDUCTOR POWER DEVICE WITH IMPROVED RUGGEDNESS (18467293)
- 1.4 MPS DIODE HAVING A NON-UNIFORMLY DOPED REGION AND METHOD FOR MANUFACTURING THE SAME (18467232)
- 1.5 MPS DIODE HAVING A DOPED REGION AND METHOD FOR MANUFACTURING THE SAME (18467251)
- 1.6 MPS DIODE HAVING NON-UNIFORMLY SPACED WELLS AND METHOD FOR MANUFACTURING THE SAME (18467258)
- 1.7 MPS DIODE HAVING NON-UNIFORMLY SPACED WELLS AND METHOD FOR MANUFACTURING THE SAME (18467278)
- 1.8 COOLING STAGE FOR COOLING DOWN A HEATED CARRIER (18467245)
Patent applications for NEXPERIA B.V. on March 21st, 2024
REDUCED STRESS CLIP FOR SEMICONDUCTOR DIE (18467786)
Main Inventor
Homer Gler Malveda
METHOD FOR MANUFACTURING A SEMICONDUCTOR PACKAGE ASSEMBLY AS WELL AS A SEMICONDUCTOR PACKAGE ASSEMBLY OBTAINED WITH THIS METHOD (18467779)
Main Inventor
Haibo Fan
SEMICONDUCTOR POWER DEVICE WITH IMPROVED RUGGEDNESS (18467293)
Main Inventor
Georgio El Zammar
MPS DIODE HAVING A NON-UNIFORMLY DOPED REGION AND METHOD FOR MANUFACTURING THE SAME (18467232)
Main Inventor
Massimo Cataldo Mazzillo
MPS DIODE HAVING A DOPED REGION AND METHOD FOR MANUFACTURING THE SAME (18467251)
Main Inventor
Massimo Cataldo Mazzillo
MPS DIODE HAVING NON-UNIFORMLY SPACED WELLS AND METHOD FOR MANUFACTURING THE SAME (18467258)
Main Inventor
Massimo Cataldo Mazzillo
MPS DIODE HAVING NON-UNIFORMLY SPACED WELLS AND METHOD FOR MANUFACTURING THE SAME (18467278)
Main Inventor
Massimo Cataldo Mazzillo
COOLING STAGE FOR COOLING DOWN A HEATED CARRIER (18467245)
Main Inventor
Arne de Roest
