NANYA TECHNOLOGY CORPORATION patent applications published on November 30th, 2023

Summary of the patent applications from NANYA TECHNOLOGY CORPORATION on November 30th, 2023

NANYA TECHNOLOGY CORPORATION has recently filed patents related to semiconductor devices and manufacturing methods. These patents describe various features and structures of semiconductor devices, as well as methods for their fabrication. Notable applications include a semiconductor device with a programmable feature, a memory structure with a unique contact design, a semiconductor device with multiple layers and components, and a method for preparing a memory device with improved performance and efficiency.

In the semiconductor device with a programmable feature, the device includes a substrate, conductive lines, conductive features, and memory cells. The substrate has two islands separated by an isolation structure, with the first island being smaller in size than the second island. The conductive lines and features connect the islands and provide electrical connectivity for the memory cells.

The memory structure patent describes a contact design with three portions extending into different layers. The first contact portion is lower than the source/drain region, and the second contact portion is located between the first and third contact portions. The specific distance between the sidewalls of the first contact portion and the source/drain region is also mentioned.

The semiconductor device patent discusses a device with various layers and components, including a substrate, dielectric layers, and metallization layers. The metallization layers surround channel layers, and the first metallization layer has a protruding portion that extends towards the second metallization layer.

The method for preparing a memory device involves forming bottom and top cells within substrates, with common bit lines connecting them. The aim is to improve the performance and efficiency of the memory device.

In terms of notable applications, the patents describe methods for manufacturing semiconductor devices using substrates with different islands, insulative layers for protection, conductive features for connectivity, and specific patterning and layering techniques. The patents also highlight the use of multiple dielectric layers in storage capacitors to enhance their performance.

- Semiconductor device with a programmable feature - Memory structure with a unique contact design - Semiconductor device with multiple layers and components - Method for preparing a memory device with improved performance and efficiency - Methods for manufacturing semiconductor devices using substrates with different islands, insulative layers, and conductive features - Use of multiple dielectric layers in storage capacitors for enhanced performance.

Patent applications for NANYA TECHNOLOGY CORPORATION on November 30th, 2023

VOLTAGE REGULATOR FOR PROVIDING WORD LINE VOLTAGE (17829350)

Main Inventor

Chih-Jen Chen

MEMORY DEVICE HAVING PROTRUSION OF WORD LINE (17824011)

Main Inventor

JAR-MING HO

SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR PREPARING THE SAME (18231912)

Main Inventor

CHENG-HSIANG FAN

METHOD OF PREPARING ACTIVE AREAS (17828802)

Main Inventor

YING-CHENG CHUANG

METHOD FOR FABRICATING SEMICONDUCTOR DEVICE WITH CONTACT STRUCTURE (17824481)

Main Inventor

CHIH-HSUAN YEH

METHOD FOR PREPARING SEMICONDUCTOR DEVICE WITH AIR SPACER (18232833)

Main Inventor

JUNG-HSING CHIEN

METHOD FOR PREPARING SEMICONDUCTOR DEVICE WITH AIR GAP (18232937)

Main Inventor

LIANG-PIN CHOU

MANUFACTURING METHOD OF SEMICONDUCTOR STRUCTURE HAVING ELASTIC MEMBER WITHIN VIA (17752642)

Main Inventor

SHING-YIH SHIH

SEMICONDUCTOR STRUCTURE HAVING ELASTIC MEMBER WITHIN VIA (17751941)

Main Inventor

SHING-YIH SHIH

METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE WITH BONDING STRUCTURE (18231254)

Main Inventor

TZU-CHING TSAI

SEMICONDUCTOR DEVICE WITH CONTACT STRUCTURE (17824012)

Main Inventor

CHIH-HSUAN YEH

STORAGE CAPACITOR WITH MULTIPLE DIELECTRICS (17751936)

Main Inventor

KAI-HUNG LIN

METHOD OF FABRICATING STORAGE CAPACITOR WITH MULTIPLE DIELECTRICS (17752638)

Main Inventor

KAI-HUNG LIN

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE HAVING PROTRUSION OF WORD LINE (17824487)

Main Inventor

CHIN-TE KUO

METHOD OF FABRICATING SEMICONDUCTOR DEVICE WITH PROGRAMMBLE FEATURE (17825480)

Main Inventor

YIN-FA CHEN

METHOD FOR PREPARING MEMORY DEVICE HAVING PROTRUSION OF WORD LINE (17824507)

Main Inventor

JAR-MING HO

SEMICONDUCTOR DEVICE AND SEMICONDUCTOR CHIP WITH PROGRAMMABLE FEATURE (17825057)

Main Inventor

YIN-FA CHEN

SEMICONDUCTOR DEVICE HAVING PROTRUSION OF WORD LINE (17824010)

Main Inventor

CHIN-TE KUO

MEMORY STRUCTURE AND METHOD OF MANUFACTURING THE SAME (17804095)

Main Inventor

Wei-Chih WANG

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE WITH PROGRAMMABLE FEATURE (17825252)

Main Inventor

YIN-FA CHEN

SEMICONDUCTOR DEVICE WITH PROGRAMABLE FEATURE (17825058)

Main Inventor

YIN-FA CHEN