Difference between revisions of "Micron Technology, Inc. patent applications published on October 12th, 2023"
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==Patent applications for Micron Technology, Inc. on October 12th, 2023== | ==Patent applications for Micron Technology, Inc. on October 12th, 2023== | ||
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'''Inventor''' | '''Inventor''' | ||
Vikas Rana | Vikas Rana | ||
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===FINE GRAINED RESOURCE MANAGEMENT FOR ROLLBACK MEMORY OPERATIONS (17716250)=== | ===FINE GRAINED RESOURCE MANAGEMENT FOR ROLLBACK MEMORY OPERATIONS (17716250)=== | ||
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'''Inventor''' | '''Inventor''' | ||
Tony M. Brewer | Tony M. Brewer | ||
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===TECHNIQUES FOR FOUR CYCLE ACCESS COMMANDS (18161757)=== | ===TECHNIQUES FOR FOUR CYCLE ACCESS COMMANDS (18161757)=== | ||
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'''Inventor''' | '''Inventor''' | ||
Sujeet V. Ayyapureddi | Sujeet V. Ayyapureddi | ||
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===STORAGE SYSTEM WITH MULTIPLE DATA PATHS DEPENDING ON DATA CLASSIFICATIONS (18295482)=== | ===STORAGE SYSTEM WITH MULTIPLE DATA PATHS DEPENDING ON DATA CLASSIFICATIONS (18295482)=== | ||
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'''Inventor''' | '''Inventor''' | ||
Reshmi BASU | Reshmi BASU | ||
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===Split a Tensor for Shuffling in Outsourcing Computation Tasks (17715863)=== | ===Split a Tensor for Shuffling in Outsourcing Computation Tasks (17715863)=== | ||
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'''Inventor''' | '''Inventor''' | ||
Andre Xian Ming Chang | Andre Xian Ming Chang | ||
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===Partition a Tensor with Varying Granularity Levels in Shuffled Secure Multiparty Computation (17715877)=== | ===Partition a Tensor with Varying Granularity Levels in Shuffled Secure Multiparty Computation (17715877)=== | ||
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'''Inventor''' | '''Inventor''' | ||
Andre Xian Ming Chang | Andre Xian Ming Chang | ||
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===Non-uniform Splitting of a Tensor in Shuffled Secure Multiparty Computation (17715885)=== | ===Non-uniform Splitting of a Tensor in Shuffled Secure Multiparty Computation (17715885)=== | ||
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'''Inventor''' | '''Inventor''' | ||
Andre Xian Ming Chang | Andre Xian Ming Chang | ||
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===MANAGING ERROR-HANDLING FLOWS IN MEMORY DEVICES (18207525)=== | ===MANAGING ERROR-HANDLING FLOWS IN MEMORY DEVICES (18207525)=== | ||
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'''Inventor''' | '''Inventor''' | ||
Kishore Kumar Muchherla | Kishore Kumar Muchherla | ||
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===EFFICIENT CACHE PROGRAM OPERATION WITH DATA ENCODING (18178105)=== | ===EFFICIENT CACHE PROGRAM OPERATION WITH DATA ENCODING (18178105)=== | ||
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'''Inventor''' | '''Inventor''' | ||
Sushanth Bhushan | Sushanth Bhushan | ||
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===SECURE OPERATING SYSTEM UPDATE (17717954)=== | ===SECURE OPERATING SYSTEM UPDATE (17717954)=== | ||
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'''Inventor''' | '''Inventor''' | ||
Zhan Liu | Zhan Liu | ||
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===MEMORY ACCESS GATE (18136250)=== | ===MEMORY ACCESS GATE (18136250)=== | ||
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'''Inventor''' | '''Inventor''' | ||
Giuseppe Cariello | Giuseppe Cariello | ||
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===ASSURING INTEGRITY AND SECURE ERASURE OF CRITICAL SECURITY PARAMETERS (18208585)=== | ===ASSURING INTEGRITY AND SECURE ERASURE OF CRITICAL SECURITY PARAMETERS (18208585)=== | ||
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'''Inventor''' | '''Inventor''' | ||
Walter Andrew Hubis | Walter Andrew Hubis | ||
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===Secure Artificial Neural Network Models in Outsourcing Deep Learning Computation (17715835)=== | ===Secure Artificial Neural Network Models in Outsourcing Deep Learning Computation (17715835)=== | ||
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'''Inventor''' | '''Inventor''' | ||
Andre Xian Ming Chang | Andre Xian Ming Chang | ||
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===Shuffled Secure Multiparty Deep Learning (17715768)=== | ===Shuffled Secure Multiparty Deep Learning (17715768)=== | ||
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Andre Xian Ming Chang | Andre Xian Ming Chang | ||
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===Secure Multiparty Deep Learning via Shuffling and Offsetting (17715798)=== | ===Secure Multiparty Deep Learning via Shuffling and Offsetting (17715798)=== | ||
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'''Inventor''' | '''Inventor''' | ||
Andre Xian Ming Chang | Andre Xian Ming Chang | ||
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===NON-DESTRUCTIVE PATTERN IDENTIFICATION AT A MEMORY DEVICE (17716580)=== | ===NON-DESTRUCTIVE PATTERN IDENTIFICATION AT A MEMORY DEVICE (17716580)=== | ||
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'''Inventor''' | '''Inventor''' | ||
Yuan He | Yuan He | ||
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===APPARATUS AND METHODS FOR THERMAL MANAGEMENT IN A MEMORY (17704154)=== | ===APPARATUS AND METHODS FOR THERMAL MANAGEMENT IN A MEMORY (17704154)=== | ||
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'''Inventor''' | '''Inventor''' | ||
Jeremy Binfet | Jeremy Binfet | ||
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===FASTER MULTI-CELL READ OPERATION USING REVERSE READ CALIBRATIONS (18117268)=== | ===FASTER MULTI-CELL READ OPERATION USING REVERSE READ CALIBRATIONS (18117268)=== | ||
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'''Inventor''' | '''Inventor''' | ||
Go Shikata | Go Shikata | ||
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===TEST CIRCUIT IN SCRIBE REGION FOR MEMORY FAILURE ANALYSIS (17719327)=== | ===TEST CIRCUIT IN SCRIBE REGION FOR MEMORY FAILURE ANALYSIS (17719327)=== | ||
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'''Inventor''' | '''Inventor''' | ||
ATSUKO OTSUKA | ATSUKO OTSUKA | ||
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===MEMORY DEVICE INCLUDING SELF-ALIGNED CONDUCTIVE CONTACTS (18200852)=== | ===MEMORY DEVICE INCLUDING SELF-ALIGNED CONDUCTIVE CONTACTS (18200852)=== | ||
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'''Inventor''' | '''Inventor''' | ||
Kar Wui Thong | Kar Wui Thong | ||
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===SEMICONDUCTOR DEVICE HAVING L-SHAPED CONDUCTIVE PATTERN (17714797)=== | ===SEMICONDUCTOR DEVICE HAVING L-SHAPED CONDUCTIVE PATTERN (17714797)=== | ||
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'''Inventor''' | '''Inventor''' | ||
Harunobu Kondo | Harunobu Kondo | ||
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===TECHNIQUES FOR FORMING A DEVICE WITH SCRIBE ASYMMETRY (17715481)=== | ===TECHNIQUES FOR FORMING A DEVICE WITH SCRIBE ASYMMETRY (17715481)=== | ||
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'''Inventor''' | '''Inventor''' | ||
Anna Maria Conti | Anna Maria Conti | ||
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===MEMORY DEVICE INCLUDING SUPPORT STRUCTURES (18209231)=== | ===MEMORY DEVICE INCLUDING SUPPORT STRUCTURES (18209231)=== | ||
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'''Inventor''' | '''Inventor''' | ||
Andrew Zhe Wei Ong | Andrew Zhe Wei Ong | ||
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===Ferroelectric Transistors and Assemblies Comprising Ferroelectric Transistors (18207905)=== | ===Ferroelectric Transistors and Assemblies Comprising Ferroelectric Transistors (18207905)=== | ||
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'''Inventor''' | '''Inventor''' | ||
Kamal M. Karda | Kamal M. Karda | ||
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===TRANSIENT LOAD MANAGEMENT (17715552)=== | ===TRANSIENT LOAD MANAGEMENT (17715552)=== | ||
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'''Inventor''' | '''Inventor''' | ||
Leon Zlotnik | Leon Zlotnik | ||
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===SOLID STATE LIGHTING SYSTEMS AND ASSOCIATED METHODS OF OPERATION AND MANUFACTURE (18335885)=== | ===SOLID STATE LIGHTING SYSTEMS AND ASSOCIATED METHODS OF OPERATION AND MANUFACTURE (18335885)=== | ||
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'''Inventor''' | '''Inventor''' | ||
Anil Tipirneni | Anil Tipirneni | ||
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===METAL GATE MEMORY DEVICE AND METHOD (17717406)=== | ===METAL GATE MEMORY DEVICE AND METHOD (17717406)=== | ||
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'''Inventor''' | '''Inventor''' | ||
Hyucksoo Yang | Hyucksoo Yang | ||
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===Integrated Assemblies and Methods of Forming Integrated Assemblies (18207499)=== | ===Integrated Assemblies and Methods of Forming Integrated Assemblies (18207499)=== | ||
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'''Inventor''' | '''Inventor''' | ||
Shuangqiang Luo | Shuangqiang Luo | ||
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===TRENCH AND PIER ARCHITECTURES FOR THREE-DIMENSIONAL MEMORY ARRAYS (17714771)=== | ===TRENCH AND PIER ARCHITECTURES FOR THREE-DIMENSIONAL MEMORY ARRAYS (17714771)=== | ||
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'''Inventor''' | '''Inventor''' | ||
Fabio Pellizzer | Fabio Pellizzer | ||
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Revision as of 01:23, 17 October 2023
Contents
- 1 Patent applications for Micron Technology, Inc. on October 12th, 2023
- 1.1 APPARATUS HAVING SEGMENTED DATA LINES AND METHODS OF THEIR OPERATION (18117553)
- 1.2 FINE GRAINED RESOURCE MANAGEMENT FOR ROLLBACK MEMORY OPERATIONS (17716250)
- 1.3 TECHNIQUES FOR FOUR CYCLE ACCESS COMMANDS (18161757)
- 1.4 STORAGE SYSTEM WITH MULTIPLE DATA PATHS DEPENDING ON DATA CLASSIFICATIONS (18295482)
- 1.5 Split a Tensor for Shuffling in Outsourcing Computation Tasks (17715863)
- 1.6 Partition a Tensor with Varying Granularity Levels in Shuffled Secure Multiparty Computation (17715877)
- 1.7 Non-uniform Splitting of a Tensor in Shuffled Secure Multiparty Computation (17715885)
- 1.8 MANAGING ERROR-HANDLING FLOWS IN MEMORY DEVICES (18207525)
- 1.9 EFFICIENT CACHE PROGRAM OPERATION WITH DATA ENCODING (18178105)
- 1.10 SECURE OPERATING SYSTEM UPDATE (17717954)
- 1.11 MEMORY ACCESS GATE (18136250)
- 1.12 ASSURING INTEGRITY AND SECURE ERASURE OF CRITICAL SECURITY PARAMETERS (18208585)
- 1.13 Secure Artificial Neural Network Models in Outsourcing Deep Learning Computation (17715835)
- 1.14 Shuffled Secure Multiparty Deep Learning (17715768)
- 1.15 Secure Multiparty Deep Learning via Shuffling and Offsetting (17715798)
- 1.16 NON-DESTRUCTIVE PATTERN IDENTIFICATION AT A MEMORY DEVICE (17716580)
- 1.17 APPARATUS AND METHODS FOR THERMAL MANAGEMENT IN A MEMORY (17704154)
- 1.18 FASTER MULTI-CELL READ OPERATION USING REVERSE READ CALIBRATIONS (18117268)
- 1.19 TEST CIRCUIT IN SCRIBE REGION FOR MEMORY FAILURE ANALYSIS (17719327)
- 1.20 MEMORY DEVICE INCLUDING SELF-ALIGNED CONDUCTIVE CONTACTS (18200852)
- 1.21 SEMICONDUCTOR DEVICE HAVING L-SHAPED CONDUCTIVE PATTERN (17714797)
- 1.22 TECHNIQUES FOR FORMING A DEVICE WITH SCRIBE ASYMMETRY (17715481)
- 1.23 MEMORY DEVICE INCLUDING SUPPORT STRUCTURES (18209231)
- 1.24 Ferroelectric Transistors and Assemblies Comprising Ferroelectric Transistors (18207905)
- 1.25 TRANSIENT LOAD MANAGEMENT (17715552)
- 1.26 SOLID STATE LIGHTING SYSTEMS AND ASSOCIATED METHODS OF OPERATION AND MANUFACTURE (18335885)
- 1.27 METAL GATE MEMORY DEVICE AND METHOD (17717406)
- 1.28 Integrated Assemblies and Methods of Forming Integrated Assemblies (18207499)
- 1.29 TRENCH AND PIER ARCHITECTURES FOR THREE-DIMENSIONAL MEMORY ARRAYS (17714771)
Patent applications for Micron Technology, Inc. on October 12th, 2023
APPARATUS HAVING SEGMENTED DATA LINES AND METHODS OF THEIR OPERATION (18117553)
Inventor Vikas Rana
FINE GRAINED RESOURCE MANAGEMENT FOR ROLLBACK MEMORY OPERATIONS (17716250)
Inventor Tony M. Brewer
TECHNIQUES FOR FOUR CYCLE ACCESS COMMANDS (18161757)
Inventor Sujeet V. Ayyapureddi
STORAGE SYSTEM WITH MULTIPLE DATA PATHS DEPENDING ON DATA CLASSIFICATIONS (18295482)
Inventor Reshmi BASU
Split a Tensor for Shuffling in Outsourcing Computation Tasks (17715863)
Inventor Andre Xian Ming Chang
Partition a Tensor with Varying Granularity Levels in Shuffled Secure Multiparty Computation (17715877)
Inventor Andre Xian Ming Chang
Non-uniform Splitting of a Tensor in Shuffled Secure Multiparty Computation (17715885)
Inventor Andre Xian Ming Chang
MANAGING ERROR-HANDLING FLOWS IN MEMORY DEVICES (18207525)
Inventor Kishore Kumar Muchherla
EFFICIENT CACHE PROGRAM OPERATION WITH DATA ENCODING (18178105)
Inventor Sushanth Bhushan
SECURE OPERATING SYSTEM UPDATE (17717954)
Inventor Zhan Liu
MEMORY ACCESS GATE (18136250)
Inventor Giuseppe Cariello
ASSURING INTEGRITY AND SECURE ERASURE OF CRITICAL SECURITY PARAMETERS (18208585)
Inventor Walter Andrew Hubis
Secure Artificial Neural Network Models in Outsourcing Deep Learning Computation (17715835)
Inventor Andre Xian Ming Chang
Shuffled Secure Multiparty Deep Learning (17715768)
Inventor Andre Xian Ming Chang
Secure Multiparty Deep Learning via Shuffling and Offsetting (17715798)
Inventor Andre Xian Ming Chang
NON-DESTRUCTIVE PATTERN IDENTIFICATION AT A MEMORY DEVICE (17716580)
Inventor Yuan He
APPARATUS AND METHODS FOR THERMAL MANAGEMENT IN A MEMORY (17704154)
Inventor Jeremy Binfet
FASTER MULTI-CELL READ OPERATION USING REVERSE READ CALIBRATIONS (18117268)
Inventor Go Shikata
TEST CIRCUIT IN SCRIBE REGION FOR MEMORY FAILURE ANALYSIS (17719327)
Inventor ATSUKO OTSUKA
MEMORY DEVICE INCLUDING SELF-ALIGNED CONDUCTIVE CONTACTS (18200852)
Inventor Kar Wui Thong
SEMICONDUCTOR DEVICE HAVING L-SHAPED CONDUCTIVE PATTERN (17714797)
Inventor Harunobu Kondo
TECHNIQUES FOR FORMING A DEVICE WITH SCRIBE ASYMMETRY (17715481)
Inventor Anna Maria Conti
MEMORY DEVICE INCLUDING SUPPORT STRUCTURES (18209231)
Inventor Andrew Zhe Wei Ong
Ferroelectric Transistors and Assemblies Comprising Ferroelectric Transistors (18207905)
Inventor Kamal M. Karda
TRANSIENT LOAD MANAGEMENT (17715552)
Inventor Leon Zlotnik
SOLID STATE LIGHTING SYSTEMS AND ASSOCIATED METHODS OF OPERATION AND MANUFACTURE (18335885)
Inventor Anil Tipirneni
METAL GATE MEMORY DEVICE AND METHOD (17717406)
Inventor Hyucksoo Yang
Integrated Assemblies and Methods of Forming Integrated Assemblies (18207499)
Inventor Shuangqiang Luo
TRENCH AND PIER ARCHITECTURES FOR THREE-DIMENSIONAL MEMORY ARRAYS (17714771)
Inventor Fabio Pellizzer