Micron Technology, Inc. patent applications published on March 21st, 2024
Summary of the patent applications from Micron Technology, Inc. on March 21st, 2024
Micron Technology, Inc. has recently filed patents for innovative semiconductor devices and memory arrays with advanced stack structures. These technologies aim to improve device performance, efficiency, and reliability in various applications such as power electronics, integrated circuits, and memory devices. The semiconductor device features a hybrid transistor in a vertical orientation, while the memory array comprises strings of memory cells with memory blocks containing insulative and conductive tiers.
Summary of notable applications:
- Power electronics
- Integrated circuits
- Sensor devices
- Memory devices
- Data storage systems
- High-performance computing
These technologies have the potential to enhance memory density, increase energy efficiency, and improve overall performance in electronic devices across industries such as consumer electronics, automotive, and telecommunications.
Contents
- 1 Patent applications for Micron Technology, Inc. on March 21st, 2024
- 1.1 TESTING OPERATIONS FOR MEMORY SYSTEMS (17949867)
- 1.2 PERFORMING DATA OPERATIONS ON GROUPED MEMORY CELLS (18521789)
- 1.3 END-TO-END QUALITY OF SERVICE MANAGEMENT FOR MEMORY DEVICE (18522726)
- 1.4 PSEUDORANDOM BINARY SEQUENCES GENERATION (17945260)
- 1.5 TRANSMISSION FAILURE FEEDBACK SCHEMES FOR REDUCING CROSSTALK (18211472)
- 1.6 ERROR DETECTION, CORRECTION, AND MEDIA MANAGEMENT ON A CXL TYPE 3 DEVICE (18169621)
- 1.7 SYNDROME DECODING SYSTEM (17949655)
- 1.8 MULTI-INTERFACE MEMORY (17945827)
- 1.9 TRANSFERRING DATA TO A MEMORY DEVICE BASED ON IMPORTANCE (18470144)
- 1.10 CUSTOM COMPUTE CORES IN INTEGRATED CIRCUIT DEVICES (18519689)
- 1.11 SWITCH AND HOLD BIASING FOR MEMORY CELL IMPRINT RECOVERY (18521872)
- 1.12 DYNAMIC MEMORY REFRESH INTERVAL TO REDUCE BANDWIDTH PENALTY (18307734)
- 1.13 ENHANCED VALLEY TRACKING WITH TRIM SETTING UPDATES IN A MEMORY DEVICE (18371308)
- 1.14 WEIGHTED WEAR LEVELING FOR IMPROVING UNIFORMITY (18521382)
- 1.15 COUNTER MANAGEMENT FOR MEMORY SYSTEMS (17934137)
- 1.16 ERROR DETECTION, CORRECTION, AND MEDIA MANAGEMENT ON A DRAM DEVICE (18169610)
- 1.17 SELECTIVE PER DIE DRAM PPR FOR CXL TYPE 3 DEVICE (18169635)
- 1.18 ALIGNMENT-OVERLAY MARK AND METHOD USING THE SAME (17933968)
- 1.19 BIT MASK FOR SYNDROME DECODING OPERATIONS (17949635)
- 1.20 SUPPORT PILLARS WITH MULTIPLE, ALTERNATING EPITAXIAL SILICON FOR HORIZONTAL ACCESS DEVICES IN VERTICAL (17945448)
- 1.21 VERTICAL DIGIT LINES WITH ALTERNATING EPITAXIAL SILICON FOR HORIZONTAL ACCESS DEVICES IN 3D MEMORY (17946925)
- 1.22 Memory Circuitry And Method Used In Forming Memory Circuitry (17948521)
- 1.23 METHODS OF FORMING ELECTRONIC DEVICES INCLUDING RECESSED CONDUCTIVE STRUCTURES AND RELATED SYSTEMS (18525597)
- 1.24 MEMORY DEVICES AND RELATED ELECTRONIC SYSTEMS (18525652)
- 1.25 SEMICONDUCTOR DEVICES AND HYBRID TRANSISTORS (18519964)
Patent applications for Micron Technology, Inc. on March 21st, 2024
TESTING OPERATIONS FOR MEMORY SYSTEMS (17949867)
Main Inventor
Yuan He
PERFORMING DATA OPERATIONS ON GROUPED MEMORY CELLS (18521789)
Main Inventor
Dung V. Nguyen
END-TO-END QUALITY OF SERVICE MANAGEMENT FOR MEMORY DEVICE (18522726)
Main Inventor
Muthazhagan Balasubramani
PSEUDORANDOM BINARY SEQUENCES GENERATION (17945260)
Main Inventor
Marco Sforzin
TRANSMISSION FAILURE FEEDBACK SCHEMES FOR REDUCING CROSSTALK (18211472)
Main Inventor
Peter Mayer
ERROR DETECTION, CORRECTION, AND MEDIA MANAGEMENT ON A CXL TYPE 3 DEVICE (18169621)
Main Inventor
Amitava Majumdar
SYNDROME DECODING SYSTEM (17949655)
Main Inventor
Leon Zlotnik
MULTI-INTERFACE MEMORY (17945827)
Main Inventor
Christopher J. Bueb
TRANSFERRING DATA TO A MEMORY DEVICE BASED ON IMPORTANCE (18470144)
Main Inventor
Robert Bielby
CUSTOM COMPUTE CORES IN INTEGRATED CIRCUIT DEVICES (18519689)
Main Inventor
Gavin L. Huggins
SWITCH AND HOLD BIASING FOR MEMORY CELL IMPRINT RECOVERY (18521872)
Main Inventor
Angelo Visconti
DYNAMIC MEMORY REFRESH INTERVAL TO REDUCE BANDWIDTH PENALTY (18307734)
Main Inventor
Gil Golov
ENHANCED VALLEY TRACKING WITH TRIM SETTING UPDATES IN A MEMORY DEVICE (18371308)
Main Inventor
Ching-Huang Lu
WEIGHTED WEAR LEVELING FOR IMPROVING UNIFORMITY (18521382)
Main Inventor
Zhongyuan Lu
COUNTER MANAGEMENT FOR MEMORY SYSTEMS (17934137)
Main Inventor
Yuan He
ERROR DETECTION, CORRECTION, AND MEDIA MANAGEMENT ON A DRAM DEVICE (18169610)
Main Inventor
Amitava Majumdar
SELECTIVE PER DIE DRAM PPR FOR CXL TYPE 3 DEVICE (18169635)
Main Inventor
Amitava Majumdar
ALIGNMENT-OVERLAY MARK AND METHOD USING THE SAME (17933968)
Main Inventor
KAZUKO YAMASHITA
BIT MASK FOR SYNDROME DECODING OPERATIONS (17949635)
Main Inventor
Leon Zlotnik
SUPPORT PILLARS WITH MULTIPLE, ALTERNATING EPITAXIAL SILICON FOR HORIZONTAL ACCESS DEVICES IN VERTICAL (17945448)
Main Inventor
David K. Hwang
VERTICAL DIGIT LINES WITH ALTERNATING EPITAXIAL SILICON FOR HORIZONTAL ACCESS DEVICES IN 3D MEMORY (17946925)
Main Inventor
Scott E. Sills
Memory Circuitry And Method Used In Forming Memory Circuitry (17948521)
Main Inventor
Andrew Li
METHODS OF FORMING ELECTRONIC DEVICES INCLUDING RECESSED CONDUCTIVE STRUCTURES AND RELATED SYSTEMS (18525597)
Main Inventor
Sidhartha Gupta
MEMORY DEVICES AND RELATED ELECTRONIC SYSTEMS (18525652)
Main Inventor
Yoshiaki Fukuzumi
SEMICONDUCTOR DEVICES AND HYBRID TRANSISTORS (18519964)
Main Inventor
Kamal M. Karda
