MANAGING ERROR-HANDLING FLOWS IN MEMORY DEVICES: abstract simplified (18207525)

• This abstract for appeared for patent application number 18207525 Titled 'MANAGING ERROR-HANDLING FLOWS IN MEMORY DEVICES'

Simplified Explanation

The abstract describes a system and method that includes a memory device and a processing device. The processing device can detect read errors in a specific block of the memory device, which is associated with a voltage offset bin. It then determines the most recent error-handling operation performed on another block associated with the same voltage offset bin. Finally, it performs the necessary error-handling operation to recover the data.

Original Abstract Submitted

Systems and methods are disclosed including a memory device and a processing device operatively coupled to the memory device. The processing device can perform operations including detecting a read error with respect to data residing in a first block of the memory device, wherein the first block is associated with a voltage offset bin; determining a most recently performed error-handling operation performed on a second block associated with the voltage offset bin; and performing the error-handling to recover the data.