Kioxia corporation (20240099029). SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME simplified abstract

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SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME

Organization Name

kioxia corporation

Inventor(s)

Yoshiki Nagashima of Tokyo (JP)

SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240099029 titled 'SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME

Simplified Explanation

The semiconductor memory device described in the abstract consists of two memory dies stacked on top of each other, connected by wiring and switch elements that allow for independent control.

  • The device includes a first memory die and a second memory die stacked using adhesives.
  • A first wiring is connected to the first memory die to supply power.
  • A first switch element is connected to the first wiring.
  • A second wiring is connected to the second memory die to supply power.
  • A second switch element is connected to the second wiring.
  • A third wiring connects to the first and second wirings via the switch elements.

Potential Applications

This technology could be applied in:

  • High-performance computing systems
  • Data centers
  • Mobile devices

Problems Solved

This technology helps in:

  • Increasing memory capacity in a compact space
  • Improving data transfer speeds
  • Enhancing overall system performance

Benefits

The benefits of this technology include:

  • Improved memory access and data processing speeds
  • Space-saving design
  • Enhanced system efficiency

Potential Commercial Applications

The potential commercial applications of this technology could be in:

  • Computer hardware manufacturing
  • Mobile device manufacturing
  • Cloud computing services

Possible Prior Art

One possible prior art for this technology could be the use of stacked memory dies in semiconductor devices to increase memory capacity and performance.

Unanswered Questions

How does this technology impact power consumption in devices?

This article does not delve into the specific details of power consumption and efficiency in devices utilizing this technology. Further research may be needed to understand the implications on power usage.

What are the potential challenges in implementing this technology on a large scale?

The article does not address the potential challenges that may arise when implementing this technology in mass production. Factors such as cost, scalability, and compatibility issues could be important considerations.


Original Abstract Submitted

a semiconductor memory device includes a first memory die, a second memory die disposed above the first memory die via adhesives, a first wiring connected to the first memory die, and configured to apply a power supply voltage to the first memory die, a first switch element connected to the first wiring, a second wiring connected to the second memory die, and configured to apply the power supply voltage to the second memory die, a second switch element connected to the second wiring, and a third wiring configured to electrically connect to the first wiring via the first switch element, and configured to electrically connect to the second wiring via the second switch element. the first switch element and the second switch element are independently controllable.