Kioxia corporation (20240095193). MEMORY SYSTEM, METHOD, AND CONTROL CIRCUIT simplified abstract
Contents
- 1 MEMORY SYSTEM, METHOD, AND CONTROL CIRCUIT
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 MEMORY SYSTEM, METHOD, AND CONTROL CIRCUIT - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Original Abstract Submitted
MEMORY SYSTEM, METHOD, AND CONTROL CIRCUIT
Organization Name
Inventor(s)
Tomoaki Suzuki of Chigasaki (JP)
MEMORY SYSTEM, METHOD, AND CONTROL CIRCUIT - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240095193 titled 'MEMORY SYSTEM, METHOD, AND CONTROL CIRCUIT
Simplified Explanation
The semiconductor memory device described in the abstract includes a control circuit that can generate multiple access requests for different circuits connected to various channels, allowing for concurrent execution of data transfers at different rates.
- The semiconductor memory device includes a first circuit, multiple second circuits, and multiple first channels connected to the first circuit.
- Each first channel is connected to one or more second circuits.
- The control circuit is connected to the memory device via a second channel.
- The control circuit generates multiple access requests for the second circuits and determines the order of execution to allow concurrent data transfers.
- The control circuit can execute multiple data transfers in parallel at different rates via the second channel.
Potential Applications
This technology could be applied in high-speed data processing systems, such as servers, where multiple data transfers need to be executed concurrently at different rates.
Problems Solved
This innovation solves the problem of optimizing data transfer efficiency in semiconductor memory devices by allowing for concurrent execution of multiple data transfers at varying rates.
Benefits
The benefits of this technology include improved data transfer speeds, increased efficiency in data processing, and enhanced overall performance of semiconductor memory devices.
Potential Commercial Applications
A potential commercial application of this technology could be in the development of high-performance computing systems for data centers and cloud computing environments.
Possible Prior Art
One possible prior art for this technology could be the development of multi-channel memory architectures in semiconductor devices to improve data transfer speeds and efficiency.
Unanswered Questions
How does this technology impact power consumption in semiconductor memory devices?
This article does not address the potential impact of this technology on power consumption in semiconductor memory devices.
What are the scalability limitations of this technology in terms of the number of channels and circuits that can be connected?
The article does not provide information on the scalability limitations of this technology in terms of the number of channels and circuits that can be connected.
Original Abstract Submitted
according to one embodiment, a semiconductor memory device includes a first circuit, multiple second circuits, and a first number of first channels connected to the first circuit. one or more second circuits are connected to each first channel. the control circuit is connected to the semiconductor memory device via a second channel. the control circuit generates multiple first access requests each for one of the second circuits. the control circuit determines order of execution of the first access requests to allow concurrent execution of a second number of first access requests designating two or more of the second circuits connected to different first channels. the control circuit executes in parallel the second number of data transfers responsive to the second number of first access requests via the second channel at a transfer rate the second number of times a transfer rate of one of the first number of first channels.
