Kioxia corporation (20240094941). Memory system simplified abstract

Memory system

Organization Name

kioxia corporation

Inventor(s)

Kensuke Yamamoto of Yokohama Kanagawa (JP)

Memory system - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240094941 titled 'Memory system

Simplified Explanation

A semiconductor memory device described in the abstract includes a memory cell for storing data, a signal pad for inputting write data to the memory cell and outputting read data to an external controller, a first control pad for receiving a timing control signal from the external controller, and a second control pad for outputting a timing control signal to the external controller. The device operates in two time periods after receiving a data out command: in the first period, dummy data is output while the second timing control signal toggles in response to the first timing control signal, and in the second period, read data is output while the second timing control signal continues to toggle.

• Memory cell for storing data
• Signal pad for inputting and outputting data
• First control pad for receiving timing control signal
• Second control pad for outputting timing control signal
• Operation in two time periods after data out command

Potential Applications

The technology described in the patent application could be applied in various semiconductor memory devices such as RAM, flash memory, and SSDs.

Problems Solved

This technology helps in improving the timing control and data output processes in semiconductor memory devices, leading to better performance and reliability.

Benefits

The benefits of this technology include enhanced data transfer efficiency, improved timing control accuracy, and overall better functionality of semiconductor memory devices.

Potential Commercial Applications

The technology could find commercial applications in the manufacturing of high-speed memory modules, storage devices, and other electronic products requiring efficient data storage and retrieval systems.

Possible Prior Art

One possible prior art for this technology could be the use of timing control signals in semiconductor memory devices to regulate data input and output processes.

How does this technology compare to existing memory devices in terms of speed and efficiency?

The article does not provide a direct comparison between this technology and existing memory devices in terms of speed and efficiency.

What are the potential limitations or challenges in implementing this technology on a larger scale?

The article does not address the potential limitations or challenges in implementing this technology on a larger scale.

Original Abstract Submitted

a semiconductor memory device includes a memory cell storing data; a signal pad inputting write data to the memory cell and from which read data read from the memory cell is output to an external controller; a first control pad receiving a first timing control signal from the external controller; and a second control pad outputting a second timing control signal to the external controller. in a first time period after a data out command is received, dummy data are output from the signal pad while the second timing control signal from the second control pad is toggling in response to toggling of the first timing control signal input to the first control pad. in a second time period after the first time period, read data are output from the signal pad while the second timing control signal is toggling in response to toggling of the first timing control signal.