Kioxia corporation (20240094932). MEMORY SYSTEM simplified abstract

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MEMORY SYSTEM

Organization Name

kioxia corporation

Inventor(s)

Tomoyuki Kantani of Yokohama Kanagawa (JP)

Kousuke Fujita of Yokohama Kanagawa (JP)

Iku Endo of Odawara Kanagawa (JP)

MEMORY SYSTEM - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240094932 titled 'MEMORY SYSTEM

Simplified Explanation

The memory system described in the abstract involves a memory controller that writes data in two different modes to different blocks of a non-volatile memory, allowing for efficient data processing and storage.

  • Memory controller writes data in a first mode to a first block of a first area of non-volatile memory
  • First mode is a write mode with a specific number of bits per memory cell
  • Copy processing is executed on the data written in the first mode to the first block
  • System data is written to a second block of the first area in the first mode
  • User data is written to a third block of a second area of the non-volatile memory in a second mode
  • Second mode is a write mode with a larger number of bits per memory cell

Potential Applications

The technology described in this patent application could be applied in:

  • Data storage systems
  • Embedded systems
  • Solid-state drives

Problems Solved

This technology addresses issues related to:

  • Efficient data processing
  • Optimal use of memory space
  • Enhanced data storage capabilities

Benefits

The benefits of this technology include:

  • Improved data management
  • Increased storage efficiency
  • Enhanced performance of memory systems

Potential Commercial Applications

A potential commercial application for this technology could be in:

  • Consumer electronics
  • Cloud storage solutions
  • Data centers

Possible Prior Art

One possible prior art related to this technology is the use of multi-level cell (MLC) NAND flash memory, which allows for storing multiple bits per memory cell.

What are the specific numbers of bits per memory cell in the first and second modes mentioned in the abstract?

The specific numbers of bits per memory cell in the first and second modes are not provided in the abstract.

How does the copy processing executed by the memory controller contribute to the overall efficiency of the memory system?

The copy processing executed by the memory controller allows for the separation of system data and user data, optimizing the storage space and enhancing data processing capabilities.


Original Abstract Submitted

a memory system includes a memory controller configured to write data in a first mode to a first block of a first area of a non-volatile memory. the first mode is a write mode for writing data with a first number of bits per memory cell. the memory controller is further configured to execute copy processing on the data written in the first mode to the first block, by writing system data written in the first block to a second block of the first area in the first mode and writing user data written in the first block to a third block of a second area of the non-volatile memory in the second mode. the second mode is a write mode for writing data with a second number of bits larger than the first number of bits per memory cell.