Kioxia corporation (20240094923). MEMORY SYSTEM simplified abstract
Contents
MEMORY SYSTEM
Organization Name
Inventor(s)
Takashi Wakutsu of Kamakura Kanagawa (JP)
Yasuaki Nakazato of Kamakura Kanagawa (JP)
Takeshi Nakano of Kawasaki Kanagawa (JP)
MEMORY SYSTEM - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240094923 titled 'MEMORY SYSTEM
Simplified Explanation
The patent application describes a controller that manages the allocation of blocks in a non-volatile memory to different areas based on specific modes of operation. The controller writes data from a host device to designated areas and transcribes valid data between different areas.
- The controller assigns different blocks to different areas in the non-volatile memory.
- Blocks assigned to the first area are used in a first mode, blocks assigned to the second area are used in a second mode with larger data capacity, and blocks assigned to the third area can be used in either mode.
- Data from the host device is written to specific areas based on designations.
- Valid data written to the first and third areas is transcribed to the second area for storage.
Potential Applications
This technology could be applied in:
- Solid-state drives
- Embedded systems
- Data storage devices
Problems Solved
This technology addresses issues such as:
- Efficient data management in non-volatile memory
- Optimizing data writing and storage processes
Benefits
The benefits of this technology include:
- Improved data storage efficiency
- Enhanced performance of memory systems
- Better utilization of memory resources
Potential Commercial Applications
The potential commercial applications of this technology include:
- Memory chip manufacturing
- Data storage solutions industry
- Consumer electronics market
Possible Prior Art
One possible prior art for this technology could be:
- Memory controllers with block allocation schemes
Unanswered Questions
How does this technology impact data transfer speeds in memory systems?
This technology can potentially improve data transfer speeds by optimizing the allocation and usage of memory blocks in different areas.
What are the potential limitations of this technology in terms of scalability?
One limitation could be the scalability of the controller in managing a large number of memory blocks and areas efficiently.
Original Abstract Submitted
a controller assigns a first plurality of blocks among a plurality of blocks provided in a non-volatile memory to a first area, assigns a second plurality of blocks to a second area, and assigns a third plurality of blocks to a third area. the controller uses each block assigned to the first area in a first mode, uses each block assigned to the second area in a second mode in which the number of bits of data written in each memory cell is larger than that in the first mode, and uses each block assigned to the third area in the first mode or the second mode. the controller writes data received from a host device to an area that corresponds to a designation from the host device out of the first area and the third area. the controller transcribes valid data written to the first area and the third area to the second area.
