International business machines corporation (20240099011). VERTICAL NAND WITH BACKSIDE STACKING simplified abstract

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VERTICAL NAND WITH BACKSIDE STACKING

Organization Name

international business machines corporation

Inventor(s)

Min Gyu Sung of Latham NY (US)

Soon-Cheon Seo of Glenmont NY (US)

Chen Zhang of Guilderland NY (US)

Ruilong Xie of Niskayuna NY (US)

Heng Wu of Santa Clara CA (US)

Julien Frougier of Albany NY (US)

VERTICAL NAND WITH BACKSIDE STACKING - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240099011 titled 'VERTICAL NAND WITH BACKSIDE STACKING

Simplified Explanation

The present invention provides semiconductor structures that include a peripheral complimentary metal-oxide semiconductor (CMOS) substrate, a first vertical NAND cell on a first side of the CMOS substrate, and a second vertical NAND cell on a second side of the CMOS substrate opposite the first side.

  • Peripheral CMOS substrate
  • First vertical NAND cell on one side of the CMOS substrate
  • Second vertical NAND cell on the opposite side of the CMOS substrate

Potential Applications

The semiconductor structures can be used in:

  • Memory devices
  • Data storage systems
  • Integrated circuits

Problems Solved

This technology helps in:

  • Increasing memory density
  • Improving data storage efficiency
  • Enhancing overall performance of semiconductor devices

Benefits

The benefits of this technology include:

  • Higher storage capacity
  • Faster data access speeds
  • Reduced power consumption

Potential Commercial Applications

This technology can be applied in:

  • Consumer electronics
  • Automotive systems
  • Telecommunications equipment

Possible Prior Art

One possible prior art could be the traditional NAND flash memory structures used in semiconductor devices.

Unanswered Questions

How does this technology compare to existing NAND flash memory structures in terms of performance and efficiency?

This article does not provide a direct comparison with existing NAND flash memory structures.

Are there any limitations or drawbacks associated with implementing this semiconductor structure in practical applications?

The article does not address any potential limitations or drawbacks of using this semiconductor structure.


Original Abstract Submitted

the present invention provides semiconductor structures. the semiconductor structures may include a peripheral complimentary metal-oxide semiconductor (cmos) substrate, a first vertical nand cell on a first side of the cmos substrate, and a second vertical nand cell on a second side of the cmos substrate opposite the first side.