Intel corporation (20240128138). EMBEDDED DIE ARCHITECTURE AND METHOD OF MAKING simplified abstract
Contents
- 1 EMBEDDED DIE ARCHITECTURE AND METHOD OF MAKING
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 EMBEDDED DIE ARCHITECTURE AND METHOD OF MAKING - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Original Abstract Submitted
EMBEDDED DIE ARCHITECTURE AND METHOD OF MAKING
Organization Name
Inventor(s)
Robert L. Sankman of Phoenix AZ (US)
Rahul N. Manepalli of Chandler AZ (US)
Robert Alan May of Chandler AZ (US)
Srinivas Venkata Ramanuja Pietambaram of Chandler AZ (US)
Bharat P. Penmecha of Phoenix AZ (US)
EMBEDDED DIE ARCHITECTURE AND METHOD OF MAKING - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240128138 titled 'EMBEDDED DIE ARCHITECTURE AND METHOD OF MAKING
Simplified Explanation
The abstract describes a semiconductor package with a substrate, core, insulator material, via, bridge die, and electronic component.
- The semiconductor package includes a substrate and a core.
- An insulator material covers the core and is present between the core and the substrate.
- A via extends between the core and the substrate.
- A bridge die is located in a recess in the substrate and is connected to the via.
- An electronic component is attached to the via on the substrate.
Potential Applications
This technology could be used in various electronic devices such as smartphones, tablets, laptops, and other consumer electronics.
Problems Solved
This technology helps in creating more compact and efficient semiconductor packages, improving the overall performance of electronic devices.
Benefits
The benefits of this technology include enhanced thermal performance, increased reliability, and reduced size of semiconductor packages.
Potential Commercial Applications
This technology could be applied in the manufacturing of advanced electronic devices for the consumer market, as well as in industrial and automotive applications.
Possible Prior Art
One possible prior art could be the use of traditional semiconductor packaging methods that may not offer the same level of compactness and efficiency as the described technology.
Unanswered Questions
How does this technology compare to existing semiconductor packaging methods in terms of cost-effectiveness?
The cost-effectiveness of this technology compared to traditional methods is not addressed in the abstract. It would be interesting to know if the benefits of this technology outweigh any potential increase in manufacturing costs.
What impact does the use of a bridge die have on the overall performance and reliability of the semiconductor package?
The abstract mentions the use of a bridge die in the substrate, but it does not delve into the specific advantages or disadvantages of this component. Understanding the role and impact of the bridge die could provide valuable insights into the technology's effectiveness.
Original Abstract Submitted
semiconductor packages and methods for forming semiconductor packages are disclosed. an example semiconductor package includes a substrate and a core. an insulator material is present over the core, and along a direction perpendicular to a first surface of the core, a portion of the insulator material is between the core and a first surface of the substrate. a via extends between the first surface of the core and a second surface of the core in the direction perpendicular to the first surface of the core. a bridge die is in a recess in the substrate. the bridge die is coupled with the via. an electronic component is coupled to an end of the via at a second surface of the substrate.
