Intel corporation (20240105774). INTEGRATED CIRCUIT STRUCTURES WITH UNIFORM EPITAXIAL SOURCE OR DRAIN CUT simplified abstract

INTEGRATED CIRCUIT STRUCTURES WITH UNIFORM EPITAXIAL SOURCE OR DRAIN CUT

Organization Name

intel corporation

Inventor(s)

Leonard P. Guler of Hillsboro OR (US)

Mohammad Hasan of Aloha OR (US)

Aryan Navabi-shirazi of Portland OR (US)

Jessica Panella of Banks OR (US)

Saurabh Acharya of Hillsboro OR (US)

Desalegne B. Teweldebrhan of Sherwood OR (US)

Madeleine Beasley of Beaverton OR (US)

INTEGRATED CIRCUIT STRUCTURES WITH UNIFORM EPITAXIAL SOURCE OR DRAIN CUT - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240105774 titled 'INTEGRATED CIRCUIT STRUCTURES WITH UNIFORM EPITAXIAL SOURCE OR DRAIN CUT

Simplified Explanation

The patent application describes integrated circuit structures with uniform epitaxial source or drain cuts. This includes sub-fin structures beneath stacks of nanowires, with epitaxial source or drain structures at the ends of the nanowire stacks having flat vertical surfaces on their lateral sidewalls.

• Integrated circuit structures with uniform epitaxial source or drain cuts:

   * Includes sub-fin structures beneath nanowire stacks
   * Epitaxial source or drain structures at ends of nanowire stacks
   * Lateral sidewalls of epitaxial structures have flat vertical surfaces

Potential Applications

The technology described in the patent application could be applied in the following areas:

• Semiconductor manufacturing
• Nanoelectronics
• Integrated circuit design

Problems Solved

The technology addresses the following issues:

• Inconsistent epitaxial source or drain cuts in integrated circuits
• Lack of uniformity in sub-fin structures
• Challenges in achieving precise lateral sidewall surfaces

Benefits

The technology offers the following benefits:

• Improved performance of integrated circuits
• Enhanced reliability of semiconductor devices
• Simplified manufacturing processes

Potential Commercial Applications

The technology could find commercial applications in:

• Consumer electronics
• Telecommunications
• Automotive industry

Possible Prior Art

One possible prior art in this field is the use of selective epitaxial growth techniques to create source or drain structures in semiconductor devices.

How does this technology impact the power consumption of integrated circuits?

The article does not provide information on how the described technology affects the power efficiency of integrated circuits. This could be an important factor for potential applications in mobile devices or IoT devices.

What are the implications of this technology on the scalability of semiconductor manufacturing processes?

The scalability of manufacturing processes is crucial for the widespread adoption of new technologies in the semiconductor industry. Understanding how this technology impacts scalability could be essential for assessing its long-term viability.

Original Abstract Submitted

integrated circuit structures having uniform epitaxial source or drain cut are described. for example, an integrated circuit structure includes a first sub-fin structure beneath a first stack of nanowires. a second sub-fin structure is beneath a second stack of nanowires. a first epitaxial source or drain structure is at an end of the first stack of nanowires, the first epitaxial source or drain structure having a first lateral sidewall having a flat vertical surface, and having a second lateral sidewall opposite the first lateral sidewall. a second epitaxial source or drain structure is at an end of the second stack of nanowires, the second epitaxial source or drain structure having a first lateral sidewall having a flat vertical surface, and having a second lateral sidewall opposite the first lateral sidewall, the first lateral sidewall of the second epitaxial source or drain structure laterally spaced apart from the second lateral sidewall of the first epitaxial source or drain structure.