Intel Corporation patent applications published on November 30th, 2023
Summary of the patent applications from Intel Corporation on November 30th, 2023
Intel Corporation has recently filed several patents related to various aspects of technology. These patents cover areas such as layer 1 (L1)/layer 2 (L2) triggered mobility (LTM) aspects, electronic device display interfaces for camera control, network interface devices with direct memory access (DMA) circuitry, secure connections over Remote Direct Memory Access (RDMA), software-based management of the physical layer (PHY) of a link, adapting secure sounding signals in communication devices, implementing high-speed Ethernet links using a hybrid PHY, gate-all-around integrated circuit structures with tightly spaced nanowires, and thin film transistors with double gates.
Notable applications of these patents include:
- Layer 1 (L1)/layer 2 (L2) triggered mobility (LTM) aspects, including inter-cell mobility, split architectures, dynamic cell group changes, activation, and deactivation.
- Electronic device display interfaces for controlling a camera and reviewing captured images, providing a simplified and user-friendly interface.
- Network interface devices with direct memory access (DMA) circuitry for processing packets and determining Extended Sequence Number (ESN) values.
- Secure connections over Remote Direct Memory Access (RDMA) with two network interface devices, acting as endpoints for Transport Layer Security (TLS) over RDMA connections.
- Software-based application for managing the physical layer (PHY) of a link using an application programming interface (API) to configure the physical layer through firmware.
- Adapting secure sounding signals in communication devices based on negotiated bandwidth for secure communication.
- Implementing high-speed Ethernet links using a hybrid PHY with non-interleaved or interleaved RS-FEC sublayers, determined during link training.
- Gate-all-around integrated circuit structures with tightly spaced nanowires and methods for fabricating them.
- Thin film transistors with double gates for improved control and performance.
In summary, Intel Corporation has filed patents covering a wide range of technological advancements, including mobility aspects, camera control interfaces, network interface devices, secure connections, software-based management of the physical layer, adaptive sounding signals, high-speed Ethernet links, integrated circuit structures, and thin film transistors. These patents demonstrate Intel's commitment to innovation and advancing technology in various fields.
Contents
- 1 Patent applications for Intel Corporation on November 30th, 2023
- 1.1 SOCKETED MEMORY ARCHITECTURE PACKAGE AND METHOD (17825558)
- 1.2 SYSTEMS AND METHODS FOR COMPUTING DOT PRODUCTS OF NIBBLES IN TWO TILE OPERANDS (18449651)
- 1.3 BOOT PROCESS FOR EARLY DISPLAY INITIALIZATION AND VISUALIZATION (18361128)
- 1.4 SYSTEMS AND METHODS FOR IMPLEMENTING AN INTELLIGENT APPLICATION PROGRAM INTERFACE FOR AN INTELLIGENT OPTIMIZATION PLATFORM (18326467)
- 1.5 POWER ERROR MONITORING AND REPORTING WITHIN A SYSTEM ON CHIP FOR FUNCTIONAL SAFETY (18302999)
- 1.6 ACCELERATED MEMORY TRAINING THROUGH IN-BAND CONFIGURATION REGISTER UPDATE MODE (18232765)
- 1.7 USB TYPE-C SUBSYSTEM (17826933)
- 1.8 MULTI-PORT MEMORY LINK EXPANDER TO SHARE DATA AMONG HOSTS (18250325)
- 1.9 AI-BASED COMPONENT PLACEMENT TECHNOLOGY FOR PCB CIRCUITS (18326772)
- 1.10 MISUSE INDEX FOR EXPLAINABLE ARTIFICIAL INTELLIGENCE IN COMPUTING ENVIRONMENTS (18323843)
- 1.11 NEURAL NETWORK TRAINING AND INFERENCE WITH HIERARCHICAL ADJACENCY MATRIX (18325348)
- 1.12 APPARATUS AND METHOD FOR SCALABLE QUBIT ADDRESSING (18231917)
- 1.13 LOSSY COMPRESSION TECHNOLOGY FOR SMALL IMAGE TILES (17824372)
- 1.14 INCREMENTAL 2D-TO-3D POSE LIFTING FOR FAST AND ACCURATE HUMAN POSE ESTIMATION (18031564)
- 1.15 METHOD AND APPARATUS FOR ENCODING BASED ON IMPORTANCE VALUES (18305175)
- 1.16 FRAGMENT COMPRESSION FOR COARSE PIXEL SHADING (18305511)
- 1.17 GLARE AND OCCLUDED VIEW COMPENSATION FOR AUTOMOTIVE AND OTHER APPLICATIONS (18322665)
- 1.18 REFRESH COMMAND CONTROL FOR HOST ASSIST OF ROW HAMMER MITIGATION (18213231)
- 1.19 VIA STRUCTURE FOR EMBEDDED COMPONENT AND METHOD FOR MAKING SAME (17752941)
- 1.20 INTEGRATED CIRCUIT ASSEMBLIES HAVING INTERCONNECTION BRIDGES SPANNING INTEGRATED CIRCUIT DEVICES THEREIN (17825340)
- 1.21 INTEGRATED CIRCUIT ASSEMBLIES HAVING INTERCONNECTION BRIDGES SPANNING RETICLE BOUNDARY / DICING STREETS OF MONOLITHIC STRUCTURES THEREIN (17825350)
- 1.22 WRAP-AROUND TRENCH CONTACT STRUCTURE AND METHODS OF FABRICATION (18232670)
- 1.23 THIN FILM TRANSISTORS HAVING DOUBLE GATES (18227233)
- 1.24 GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING NANOWIRES WITH TIGHT VERTICAL SPACING (18228139)
- 1.25 ANTENNA SWITCHING FOR IMPROVED IN-DEVICE CO-EXISTENCE PERFORMANCE (18049651)
- 1.26 HYBRID PHY WITH INTERLEAVED AND NON-INTERLEAVED RS-FEC AND FEC MODE DETERMINATION DURING ADAPTIVE LINK TRAINING PROTOCOL (18199697)
- 1.27 ADAPTATION OF SECURE SOUNDING SIGNAL TO BANDWIDTH VARIATION (18190906)
- 1.28 SOFTWARE-BASED PHYSICAL LAYER CONFIGURATION (18323812)
- 1.29 IN-NETWORK COMPUTE OPERATIONS UTILIZING ENCRYPTED COMMUNICATIONS (18230588)
- 1.30 ENCODING OF AN IMPLICIT PACKET SEQUENCE NUMBER IN A PACKET (18231726)
- 1.31 USER INTERFACES FOR ELECTRONIC DEVICES (18189789)
- 1.32 MOBILITY FEATURES FOR NEXT GENERATION CELLULAR NETWORKS (18352810)
Patent applications for Intel Corporation on November 30th, 2023
SOCKETED MEMORY ARCHITECTURE PACKAGE AND METHOD (17825558)
Main Inventor
Siva Prasad Jangili Ganga
SYSTEMS AND METHODS FOR COMPUTING DOT PRODUCTS OF NIBBLES IN TWO TILE OPERANDS (18449651)
Main Inventor
Raanan Sade
BOOT PROCESS FOR EARLY DISPLAY INITIALIZATION AND VISUALIZATION (18361128)
Main Inventor
Subrata Banik
SYSTEMS AND METHODS FOR IMPLEMENTING AN INTELLIGENT APPLICATION PROGRAM INTERFACE FOR AN INTELLIGENT OPTIMIZATION PLATFORM (18326467)
Main Inventor
Alexandra Johnson
POWER ERROR MONITORING AND REPORTING WITHIN A SYSTEM ON CHIP FOR FUNCTIONAL SAFETY (18302999)
Main Inventor
Prashant D. Chaudhari
ACCELERATED MEMORY TRAINING THROUGH IN-BAND CONFIGURATION REGISTER UPDATE MODE (18232765)
Main Inventor
Saravanan SETHURAMAN
USB TYPE-C SUBSYSTEM (17826933)
Main Inventor
Udaya Natarajan
MULTI-PORT MEMORY LINK EXPANDER TO SHARE DATA AMONG HOSTS (18250325)
Main Inventor
Zhuangzhi Li
AI-BASED COMPONENT PLACEMENT TECHNOLOGY FOR PCB CIRCUITS (18326772)
Main Inventor
Jianfang Zhu
MISUSE INDEX FOR EXPLAINABLE ARTIFICIAL INTELLIGENCE IN COMPUTING ENVIRONMENTS (18323843)
Main Inventor
GLEN J. ANDERSON
NEURAL NETWORK TRAINING AND INFERENCE WITH HIERARCHICAL ADJACENCY MATRIX (18325348)
Main Inventor
Emmanouil Ioannis Farsarakis
APPARATUS AND METHOD FOR SCALABLE QUBIT ADDRESSING (18231917)
Main Inventor
Xiang ZOU
LOSSY COMPRESSION TECHNOLOGY FOR SMALL IMAGE TILES (17824372)
Main Inventor
Sreenivas Kothandaraman
INCREMENTAL 2D-TO-3D POSE LIFTING FOR FAST AND ACCURATE HUMAN POSE ESTIMATION (18031564)
Main Inventor
Anbang YAO
METHOD AND APPARATUS FOR ENCODING BASED ON IMPORTANCE VALUES (18305175)
Main Inventor
Yejun Guo
FRAGMENT COMPRESSION FOR COARSE PIXEL SHADING (18305511)
Main Inventor
Prasoonkumar Surti
GLARE AND OCCLUDED VIEW COMPENSATION FOR AUTOMOTIVE AND OTHER APPLICATIONS (18322665)
Main Inventor
Arthur J. Runyan
REFRESH COMMAND CONTROL FOR HOST ASSIST OF ROW HAMMER MITIGATION (18213231)
Main Inventor
Bill NALE
VIA STRUCTURE FOR EMBEDDED COMPONENT AND METHOD FOR MAKING SAME (17752941)
Main Inventor
Kristof Darmawikarta
INTEGRATED CIRCUIT ASSEMBLIES HAVING INTERCONNECTION BRIDGES SPANNING INTEGRATED CIRCUIT DEVICES THEREIN (17825340)
Main Inventor
Kai-Chiang Wu
INTEGRATED CIRCUIT ASSEMBLIES HAVING INTERCONNECTION BRIDGES SPANNING RETICLE BOUNDARY / DICING STREETS OF MONOLITHIC STRUCTURES THEREIN (17825350)
Main Inventor
Debendra Mallik
WRAP-AROUND TRENCH CONTACT STRUCTURE AND METHODS OF FABRICATION (18232670)
Main Inventor
Joseph STEIGERWALD
THIN FILM TRANSISTORS HAVING DOUBLE GATES (18227233)
Main Inventor
Abhishek A. SHARMA
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING NANOWIRES WITH TIGHT VERTICAL SPACING (18228139)
Main Inventor
Glenn GLASS
ANTENNA SWITCHING FOR IMPROVED IN-DEVICE CO-EXISTENCE PERFORMANCE (18049651)
Main Inventor
Santhosh AP
HYBRID PHY WITH INTERLEAVED AND NON-INTERLEAVED RS-FEC AND FEC MODE DETERMINATION DURING ADAPTIVE LINK TRAINING PROTOCOL (18199697)
Main Inventor
Kent Lusted
ADAPTATION OF SECURE SOUNDING SIGNAL TO BANDWIDTH VARIATION (18190906)
Main Inventor
Feng JIANG
SOFTWARE-BASED PHYSICAL LAYER CONFIGURATION (18323812)
Main Inventor
Nishant S. Shah
IN-NETWORK COMPUTE OPERATIONS UTILIZING ENCRYPTED COMMUNICATIONS (18230588)
Main Inventor
Helia A. NAEIMI
ENCODING OF AN IMPLICIT PACKET SEQUENCE NUMBER IN A PACKET (18231726)
Main Inventor
Philip GLYNN
USER INTERFACES FOR ELECTRONIC DEVICES (18189789)
Main Inventor
Peter W. Winer
MOBILITY FEATURES FOR NEXT GENERATION CELLULAR NETWORKS (18352810)
Main Inventor
Yi Guo
