INTERNATIONAL BUSINESS MACHINES CORPORATION patent applications on March 28th, 2024
Patent Applications by INTERNATIONAL BUSINESS MACHINES CORPORATION on March 28th, 2024
INTERNATIONAL BUSINESS MACHINES CORPORATION: 92 patent applications
INTERNATIONAL BUSINESS MACHINES CORPORATION has applied for patents in the areas of H01L23/528 (16), H01L23/5286 (13), H01L29/775 (10), H01L29/417 (9), G06N3/08 (8)
With keywords such as: data, based, device, user, power, computer, layer, backside, region, and contact in patent application abstracts.
Patent Applications by INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor(s): Jessica Katz of Brooklyn NY (US) for international business machines corporation, Tyler Nicole King of Durham NC (US) for international business machines corporation
IPC Code(s): A61M16/06, A61M16/00
Abstract: a flexible ear cuff, configured to receive an oxygen tube and the flexible ear cuff is shaped to nestle between a pinna of an ear and a head of a patient. thus, the flexible ear cuff may be used to secure the oxygen tube to the head of a patient.
Inventor(s): Shailendra Moyal of Pune (IN) for international business machines corporation, Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation, Rasika Ashirwad Vyawahare of Pune (IN) for international business machines corporation, Partho Ghosh of Kolkata (IN) for international business machines corporation
IPC Code(s): B25J9/16, B25J19/02, B65G47/90
Abstract: in an approach for improving robotic automation systems, a processor receives a request for a set of materials for an activity to be performed. a processor identifies one or more materials of the set of materials. a processor determines a sequence of operations to move the one or more materials. a processor prompts a first robot to pick a first material at the place of origination using a clamping system and to deposit the first material in a first micro trolley. responsive to determining an arm of the first robot is in a first orientation, a processor moves the first material along a first track on an arm of a multi-robotic system from the place of origination to the place of destination. a processor prompts a second robot to pick the first material from the first micro trolley at the place of destination using the clamping system.
Inventor(s): Saraswathi Sailaja Perumalla of Visakhapatnam (IN) for international business machines corporation, Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation, Akash U. Dhoot of Pune (IN) for international business machines corporation, Bhavya Pochiraju of Hyderabad (IN) for international business machines corporation
IPC Code(s): B60L53/31, B60L53/16, B60L53/30
Abstract: a mobile charging station for transporting and recharging multiple uavs (unmanned aerial vehicles), typically small uavs, with the charging station, itself, being in the form of a carrier uav. by transporting smaller passenger uavs in, or on, the larger carrier uav: (i) the smaller uavs effectively have a longer range because they can be taken part, or even most, of the way to a target destination by riding in, or on, the larger carrier uav; (ii) the passenger uavs can have their electrical batteries re-charged; (ii) the passenger uavs can have their batteries replaced; and/or (iv) the passenger uavs can have their hydrogen fuel cells recharged with hydrogen (for examples, by replacement of the fuel cell or by pumping hydrogen into the existing fuel cell.
Inventor(s): Mauro MARZORATI of Lutz FL (US) for international business machines corporation, Carolina GARCIA DELGADO of Jalisco (MX) for international business machines corporation, Jeremy R. FOX of Georgetown TX (US) for international business machines corporation, Sarbajit K. RAKSHIT of Kolkata (IN) for international business machines corporation
IPC Code(s): B60W60/00, G07C5/10
Abstract: techniques are provided for vehicle and mobility path recommendations. in one embodiment, the techniques involve identifying emergency response factors in historical telematics data, categorizing emergency situation outcomes based on the emergency response factors, identifying patterns between the emergency response factors and the emergency situation outcomes, generating a vehicle recommendation based on the identified patterns, determining a location of a vehicle referenced by the vehicle recommendation, generating a mobility path recommendation based on the vehicle recommendation and the location of the vehicle referenced by the vehicle recommendation, and transferring the vehicle recommendation and the mobility path recommendation to an emergency services entity.
Inventor(s): Gregory Breyta of San Jose CA (US) for international business machines corporation, Rudy J. Wojtecki of San Jose CA (US) for international business machines corporation
IPC Code(s): C08J7/02, C08J11/26
Abstract: a depolymerization reaction of a polyester input with an organocatalyst and an alcohol solvent produces (i) a recycled monomeric or oligomeric diester from the polyester, (ii) the organocatalyst for reuse, and (iii) the alcohol solvent, which may also be reused. the presence of volatile impurities, such as water, acetyl aldehyde, and organic solvents can interfere with the success of the depolymerization reaction. a pre-reaction distillation step removes volatile impurities from the polyester input resulting in an efficient depolymerization reaction with consistency among batches. the polyester input may be further treated with a water azeotrope to remove water from the polyester input prior to the pre-reaction distillation.
Inventor(s): Sagarika Mukesh of ALBANY NY (US) for international business machines corporation, Steven Holmes of Red Hook NY (US) for international business machines corporation, John S. Werner of Fishkill NY (US) for international business machines corporation, Benjamin Hardy Wunsch of Mt. Kisco NY (US) for international business machines corporation, Arkadiy O. Tsfasman of Wappingers Falls NY (US) for international business machines corporation
IPC Code(s): C12M3/06, B81B1/00, B81C1/00, C12M1/00, G01N33/50
Abstract: a neural lattice device includes a substrate having formed therein one or more wells and one or more supply ducts. a channel network includes one or more channels configured to establish fluid communication among the at least one well and the at least one supply duct. a reservoir is coupled to the substrate and configured to hold a fluid, and a cover is disposed against an upper surface of the substrate and configured to hermetically seal the wells, the supply ducts and the channel network.
Inventor(s): Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation, Jagabondhu Hazra of Bangalore (IN) for international business machines corporation, Manikandan Padmanaban of Chennai (IN) for international business machines corporation
IPC Code(s): F03D7/02, F03D9/00, H02S20/32
Abstract: an approach for adjusting the inclination of a solar panel and the pitch of one or more micro-turbines to maximize power output. the approach predicts wind velocity at a small opening of an inclined solar panel wherein a plurality of micro-turbines is located. the approach predicts solar irradiance striking the inclined solar panel. the approach calculates an optimal solar panel inclination angle and micro-turbine pitch based on maximizing power output. the approach adjusts the solar panel inclination angle and micro-turbine pitch based on the calculation.
Inventor(s): Venkata Vara Prasad Karri of Visakhapatnam (IN) for international business machines corporation, Hemant Kumar Sivaswamy of Pune (IN) for international business machines corporation, Partho Ghosh of Kolkata (IN) for international business machines corporation, Saraswathi Sailaja Perumalla of Visakhapatnam (IN) for international business machines corporation
IPC Code(s): G01C21/34, G01C21/36
Abstract: generating safety level scores of travel parking spots by an ai model trained by supervised learning using labeled online source data and static and dynamic iot data, determining a current location and travel route of a vehicle, identifying potential travel parking spots within the geospatial area of the current location and travel route of the vehicle, receiving data from online sources and static and dynamic data of iot devices in the vicinity of the travel parking spots, generating by the ai model, safety level scores for the travel parking spots within a geospatial area of the vehicle, and sending a listing of the safety level scores to a computing device associated with the vehicle.
Inventor(s): Arvind Kumar of Chappaqua NY (US) for international business machines corporation, Ramachandra Divakaruni of Ossining NY (US) for international business machines corporation, Mukta Ghate Farooq of HOPEWELL JCT NY (US) for international business machines corporation, John W. Golz of HOPEWELL JCT NY (US) for international business machines corporation, JIN PING HAN of Yorktown Heights NY (US) for international business machines corporation, Mounir Meghelli of Tarrytown NY (US) for international business machines corporation
IPC Code(s): G01R31/28, G01R31/3187, G06F13/40
Abstract: a semiconductor integrated circuit device includes: an active bridge; a first chiplet and a second chiplet mounted onto the active bridge; and a short-to-long converter circuit (slcc) that has analog and digital portions. the active bridge includes at least the analog portion of the slcc, which is electrically connected to at least the first chiplet; and a short-reach physical layer that electrically connects the first chiplet and the second chiplet. the first chiplet includes a first logic core; a first chiplet interface that is electrically connected between the first logic core and the slcc; and a second chiplet interface that is electrically connected between the first logic core and the second chiplet. the second chiplet includes a second logic core; and a third chiplet interface that is electrically connected between the second logic core and the second chiplet interface. the active bridge also can include a built-in-self-test (bist) circuit.
Inventor(s): Dzung Tien Phan of Pleasantville NY (US) for international business machines corporation, Lam Minh Nguyen of Ossining NY (US) for international business machines corporation
IPC Code(s): G05B13/02
Abstract: methods, systems, and computer program products for a decision-improvement framework are provided herein. a computer-implemented method includes obtaining regression functions that predict an output of processes of a physical system based on inputs received at each process; automatically generating one or more constraints and one or more objective functions for a model for the physical system based on the regression functions and a representation of the physical system, where the representation specifies relationships between at least a portion of the processes; identifying a set of parameter values for controlling the physical system based on the model; generating a score, for the set of parameter values, based on a predicted improvement of the physical system relative to historical performance of the physical system; and in response to the generated score satisfying a threshold, causing the physical system to be configured in accordance with the set of parameter values.
Inventor(s): Melanie Dauber of Oceanside NY (US) for international business machines corporation, Zachary A. Silverstein of Georgetown TX (US) for international business machines corporation, Jacob Ryan Jepperson of St Paul MN (US) for international business machines corporation, Spencer Thomas Reynolds of Austin TX (US) for international business machines corporation, Jeremy R. Fox of Georgetown TX (US) for international business machines corporation
IPC Code(s): G05B19/4155, G06F8/61, G06F8/65, G06F9/54
Abstract: a method for data transfer from a legacy system to a modernized application alternative to the legacy system is provided. a robotic process automation (rpa) agent monitors incoming legacy payloads. the rpa agent creates an integration pathway from the legacy system to the modernized application alternative to the legacy system. the rpa agent intercepts the incoming legacy payloads using any of payload injection, cancellation, or workflow interruption by integrating the rpa agent at a user interface (ui) or an application programming interface (api) level. the rpa agent captures the incoming legacy payloads. the rpa agent executes a determination of heritage, modernized, or mixed origination. the method also includes installing, through the integration pathway under a control of the rpa agent, portions of the legacy system corresponding to the incoming legacy payloads into the modernized application alternative to the legacy system responsive to the determination of heritage, modernized, or mixed origination.
Inventor(s): Atul Mene of Morrisville NC (US) for international business machines corporation, Martin G. Keen of Cary NC (US) for international business machines corporation, Tushar Agrawal of West Fargo ND (US) for international business machines corporation, Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation, Jeremy R. Fox of Georgetown TX (US) for international business machines corporation
IPC Code(s): G05D1/02
Abstract: provided is a computer-implemented method, system, and computer program product for intelligently assigning robotic edge devices to perform a task using an edge computing ecosystem. a processor may identify a plurality of robotic edge devices in a geographic location. the processor may determine attributes for each robotic edge device of the plurality of robotic edge devices. the processor may identify a task to be performed at the geographic location by the plurality of robotic edge devices. the processor may determine, based on the attributes, a subset of robotic edge devices that are capable of completing the task. the processor may assign the subset of robotic edge devices to complete the task.
Inventor(s): Justin Henspeter of Kasson MN (US) for international business machines corporation, Michael Lee Miller of Rochester MN (US) for international business machines corporation, Eric B. Swenson of Pine Island MN (US) for international business machines corporation, Jordan Keuseman of Rochester MN (US) for international business machines corporation
IPC Code(s): G05F1/46
Abstract: a discrete vrm card includes a first vrm controller and a second vrm controller. the discrete vrm card also includes a first primary power stage, a second primary power stage, and an adaptable spare stage. the discrete vrm card includes a first switch and a second switch. closing the first switch connects the adaptable spare converter with an output of the first primary power stage. closing the second switch connects the adaptable spare converter an output of the second primary power stage.
Inventor(s): Dana L. Price of Surf City NC (US) for international business machines corporation, Diane Chalmers of Rochester MN (US) for international business machines corporation, Nicholas Tsang of Saratoga CA (US) for international business machines corporation
IPC Code(s): G06F3/14, G06T3/40, G06T11/00, H04N5/262
Abstract: according to one embodiment, a method, computer system, and computer program product for dynamically customizing meeting experiences is provided. the embodiment may include initiating a video call. the embodiment may also include determining one or more sets of user preferences for one or more users. the embodiment may further include identifying visual characteristics of a main video stream on the video call. the embodiment may also include adjusting one or more visual characteristics of the main video stream according to the one or more sets of user preferences to create one or more custom video streams for the one or more users.
Inventor(s): Jing Zhao of Beijing (CN) for international business machines corporation, Xiao Yun Wang of Beijing (CN) for international business machines corporation, Si Yu Chen of Beijing (CN) for international business machines corporation, Jiang Yi Liu of Beijing (CN) for international business machines corporation, Jiangang Deng of Beijing (CN) for international business machines corporation
IPC Code(s): G06F8/36, G06F8/41
Abstract: a method, system, and computer program product for script generation and recommendation from behavior trees are provided. the method receives a set of input commands within a programming interface. the set of input commands is parsed into a set of command parts. the set of input commands is normalized based on the set of command parts to generate a set of normalized commands. a set of behavior trees are generated based on the set of normalized commands and the set of parts. the method generates a set of command scripts based on the set of behavior trees.
Inventor(s): Tram Thi Mai Nguyen of Santa Clara CA (US) for international business machines corporation, Prasoon Sinha of Melbourne (AU) for international business machines corporation, Lee Jason Sanders of West Sussex (GB) for international business machines corporation, James Raimondo of Santa Clara CA (US) for international business machines corporation
IPC Code(s): G06F9/445, G06F8/65
Abstract: according to an aspect, a computer-implemented method includes receiving a request to evaluate an update to a computing system and obtaining a current configuration of the computing system. aspects also include identifying one or more changes that the update will require to the current configuration and obtaining performance data corresponding to the one or more changes from a data repository. aspects further include calculating a confidence score for the update based on the performance data and providing the computing system with the confidence score.
Inventor(s): Peng Hui Jiang of Beijing (CN) for international business machines corporation, Yue Wang of Beijing (CN) for international business machines corporation, Jun Su of Beijing (CN) for international business machines corporation, Su Liu of Austin TX (US) for international business machines corporation, Sheng Yan Sun of Beijing (CN) for international business machines corporation
IPC Code(s): G06F9/455, G06F9/38
Abstract: a computer-implemented method, system and computer program product for scaling a resource of a database as a service (dbaas) cluster in a cloud platform. user service requests from a service cluster to be processed by the dbaas cluster are received. a first set of tracing data is generated by a service mesh, which facilitates service-to-service communication between the service cluster and the dbaas cluster, from the user service requests. a second set of tracing data is generated by the dbaas cluster from handling the user service requests. a dependency tree is then generated to discover application relationships to identify potential bottlenecks in nodes of the dbaas cluster based on these sets of tracing data. the pod(s) of a dbaas node are then scaled based on the dependency tree, which is used in part, to predict the utilization of the resources of the dbaas node identified as being a potential bottleneck.
Inventor(s): Martin A. Ross of Gosport (GB) for international business machines corporation, Jack William Donato Evans of Rochester (GB) for international business machines corporation, Luke James Powlett of Romsey (GB) for international business machines corporation, Jack Richard William Stevenson of WINCHESTER (GB) for international business machines corporation
IPC Code(s): G06F9/48, G06N5/04
Abstract: dynamically calculating and re-calculating priority values for a set of microservices that are deployed and run in a containerized environment. before new priority values are assigned to the microservices, an initial default priority value is assigned to a microservice of interest. when the microservice of interest is deployed and run in the containerized environment, the generated telemetry data is used, in part, as a basis to determine a frequency in which any given microservice is being utilized, and more particularly, the microservice of interest. based upon the determined frequency, a role for the microservice of interest can be inferred. as a result, this inferred role for the microservice of interest is used to dynamically assign a current priority value for the microservice of interest.
Inventor(s): Enrico Regge of Stuttgart (DE) for international business machines corporation, Michael Beck of Bad Teinach-Zavelstein (DE) for international business machines corporation, Werner Schuetz of Nufringen (DE) for international business machines corporation, Peter Gerstl of Holzgerlingen (DE) for international business machines corporation, Simon Daniel Moser of Gärtringen (DE) for international business machines corporation, Sugandha Agrawal of Stuttgart (DE) for international business machines corporation
IPC Code(s): G06F9/50, H04L67/568
Abstract: a computer-implemented method for executing a serverless workload on a transient infrastructure is disclosed. the method comprises receiving a request for executing a workload and at least one policy, selecting an infrastructure component of the transient infrastructure for an execution of the workload, wherein the transient infrastructure is implemented utilizing a plurality of geographically distributed computing nodes, and executing the workload on the transient infrastructure. furthermore, the method comprises upon receiving an interfering event during the execution of the workload causing a stop of the workload execution, freezing the execution of the workload, storing intermediate results and statuses of the workload execution in a cross-domain storage system, terminating the execution of the workload, and continuing the workload execution using the intermediate results and under a constraint defined by the at least one policy.
Inventor(s): Gerard Lawrence Pinto of Livermore CA (US) for international business machines corporation, Lalit Somavarapha of Fremont CA (US) for international business machines corporation, Matthias Seul of Folsom CA (US) for international business machines corporation
IPC Code(s): G06F9/50
Abstract: a method, computer program, and computer system are provided for resource allocation in a cloud computing environment. a request for resource allocation is received from a user in a cloud computing environment. a profile is determined for the user based on one or more metrics. a workload allocation is assigned to the user based on the determined profile matching one or more clusters of other users. a usage value of the assigned workload allocation to the user may be monitored. the user is immediately upgraded to a higher workload allocation based on the usage value exceeding a threshold value.
Inventor(s): Amar Shah of Pune (IN) for international business machines corporation, Venkata Kiran Kumar Darbha of Hyderabad (IN) for international business machines corporation
IPC Code(s): G06F9/54, H04L69/22
Abstract: dynamically controlling message expiry is provided. a message located in a message queue that has an expiry value and a dynamic expiry value set by a message producer in a header of the message is tracked. it is determined that the message is eligible for extension of the expiry value based on the dynamic expiry value being set to a particular value. an amount of time before a message consumer can process the message is determined based on one or more factors. the expiry value of the message is extended to form an extended expiry value in response to determining that the message is likely to expire in the message queue prior to the message consumer processing the message based on the one or more factors.
Inventor(s): Maunik Patel of Tucson AZ (US) for international business machines corporation, Tara Astigarraga of Fairport NY (US) for international business machines corporation, Jimmy Pazhoor John of CARY NC (US) for international business machines corporation, Kieron Dirk Anthony Hinds of Poughkeepsie NY (US) for international business machines corporation
IPC Code(s): G06F11/20
Abstract: an approach for recommending a prioritized list of replacement of failed drives. the approach receives data associated with failed drives from data centers. the approach segregates the data into variable groups based on a data type. the approach creates a logical layer of entry lists, based on the units, for instantiations of the executable program. the approach sorts the data into priority groups based on priority rules associated with the variable groups and predetermined thresholds. the approach generates a prioritized list of failed drive replacement order based on an ensemble machine learning model. the approach outputs the prioritized list, replacement drive availability information and drive replacement personnel availability information.
Inventor(s): Pavankumar Murali of Ardsley NY (US) for international business machines corporation, Dzung Tien Phan of PLEASANTVILLE NY (US) for international business machines corporation, Nianjun Zhou of Chappaqua NY (US) for international business machines corporation, Lam Minh Nguyen of Ossining NY (US) for international business machines corporation
IPC Code(s): G06F11/07, G06F11/00
Abstract: in example aspects of this disclosure, a method includes generating, by one or more computing devices, a parametric model that expresses condition states for each of a plurality of assets, and the probability of the assets transitioning between the condition states; generating, by the one or more computing devices, stochastic degradation predictions of a group of the assets, based on the condition states and the probability of transitioning between the condition states for at least some of the assets; and generating, by the one or more computing devices, a maintenance schedule based on: the stochastic degradation predictions of the group of the assets, costs of corrective maintenance for assets in a failed state, and costs of scheduled maintenance for the assets.
Inventor(s): Barry M. Trager of Yorktown Heights NY (US) for international business machines corporation, Patrick James Meaney of Poughkeepsie NY (US) for international business machines corporation, Glenn David Gilda of Binghamton NY (US) for international business machines corporation, Lawrence Jones of Endwell NY (US) for international business machines corporation
IPC Code(s): G06F11/10, G06F11/22
Abstract: a memory controller stores each of a plurality of data blocks encoded by error correction code (ecc) across multiple channels of a redundant memory system. based on receiving, from the memory system, channel data of a fetch operation requesting a data block, the memory controller decodes the channel data and concurrently generates a predicted channel mark based on tests of channel-induced syndromes generated from the channel data. the predicted channel mark identifies a marked channel among the multiple channels as a likely source of data errors. the memory controller determines whether the decoding detects an uncorrectable error in the channel data and, based on determining the decoding detects an uncorrectable error in the channel data, re-reads channel data corresponding to the data block and corrects the re-read channel data by excluding, from decoding, channel data received from the marked channel.
Inventor(s): Bao Zhang of Beijing (CN) for international business machines corporation, Jin Hong Fu of Beijing (CN) for international business machines corporation, Peng Hui Jiang of Beijing (CN) for international business machines corporation, Shi Chong Ma of Beijing (CN) for international business machines corporation, He Huang of Beijing (CN) for international business machines corporation, Jia Yu of Beijing (CN) for international business machines corporation
IPC Code(s): G06F11/36
Abstract: determination and provision of improved representations of program flow control are provided by a method that monitors execution of binary code of a program on a computer system. the monitoring includes monitoring manipulation(s) of call stack(s) maintained by the computer system for the execution of the binary code. the method, based on the monitoring, determines function call pattern(s) and branch pattern(s) exhibited by the execution of the binary code. the method identifies, from the binary code and using the determined function call pattern(s) and branch pattern(s), function calls and branches, relations between the function calls and branches, and function and variable names. the method also provides a representation of program flow control of the program using the identified function calls and branches, relations, and function and variable names.
Inventor(s): Anna Tatunashvili of Bratislava (SK) for international business machines corporation, Rupam Bhattacharjee of Karimganj (IN) for international business machines corporation, Siba Prasad Satapathy of Bangalore (IN) for international business machines corporation, George Thayyil Jacob Sushil of Bangalore (IN) for international business machines corporation, Jozef Fekiç of Dublin (IE) for international business machines corporation
IPC Code(s): G06F11/36
Abstract: in an approach to improve the extracting test datasets for testing and resource optimization, embodiments execute a test run on a full dataset of a job, and identify existing bottlenecks in the job through a run-time monitoring interface. additionally, embodiments execute a run-time metrics analysis, a source code analysis, and a source data impact analysis of a distributed data processing engine executing a distributed data processing job, and generate, by an analysis and impact scoring engine, an impact scoring table of job transformations based on the source code analysis. furthermore, embodiments generate data extraction rules based on the impact scoring table, and extract a test dataset based on the data extraction rules. moreover, embodiments evaluate the data extraction rules against user defined thresholds, and prepare a representative test dataset, and output, through a user interface on a computing device, the representative test dataset to a user.
Inventor(s): Michael Joseph Cadigan, JR. of Poughkeepsie NY (US) for international business machines corporation, Gregory William Alexander of Pflugerville TX (US) for international business machines corporation, Deanna Postles Dunn Berger of Hyde Park NY (US) for international business machines corporation, Timothy Bronson of Round Rock TX (US) for international business machines corporation, Chung-Lung K. Shum of Wappingers Falls NY (US) for international business machines corporation, Aaron Tsai of Hyde Park NY (US) for international business machines corporation
IPC Code(s): G06F12/0891, G06F12/0811
Abstract: embodiments are for processor cross-core cache line contention management. a computer-implemented method includes sending a cross-invalidate command to one or more caches based on receiving a cache state change request for a cache line in a symmetric multiprocessing system and determining a retry delay based on receiving a cross-invalidate reject response from at least one of the one or more caches. the computer-implemented method also includes waiting until a retry delay period associated with the retry delay has elapsed to resend the cross-invalidate command to the one or more caches and granting the cache state change request for the cache line based on receiving a cross-invalidate accept response from the one or more caches.
Inventor(s): MUDHAKAR SRIVATSA of White Plains NY (US) for international business machines corporation, RAGHU KIRAN GANTI of White Plains NY (US) for international business machines corporation, Joshua M. Rosenkranz of White Plains NY (US) for international business machines corporation, Linsong Chu of White Plains NY (US) for international business machines corporation, Tuan Minh HOANG TRONG of Jackson Heights NY (US) for international business machines corporation, Utpal Mangla of Toronto (CA) for international business machines corporation, SATISHKUMAR SADAGOPAN of Leawood KS (US) for international business machines corporation, Mathews Thomas of Flower Mound TX (US) for international business machines corporation
IPC Code(s): G06F16/22, G06F16/2455, G06F16/28
Abstract: a computer implemented method performs data skipping in a hierarchically organized computing system. a group of processor units determines leaf node data sketches for data in leaf nodes in the hierarchically organized computing system. the leaf node data sketches summarize attributes of data in the leaf nodes. the group of processor units aggregates the leaf node data sketches at intermediate nodes in the hierarchically organized computing system to form aggregated data sketches at the intermediate nodes and retains data sketches received at the intermediate nodes from a group of child nodes to form retained data sketches. the retained data sketches are one of leaf node data sketches and the aggregated data sketches. the group of processor units searches the data using the retained data sketches and the data skipping within the hierarchically organized computing system in response to queries made to the intermediate nodes in the hierarchically organized computing system.
Inventor(s): Michael Drzewucki of Woodbridge VA (US) for international business machines corporation, Elinna Shek of Ashburn VA (US) for international business machines corporation, Keith Gregory Frost of Delaware OH (US) for international business machines corporation, Christopher F. Ackermann of Fairfax VA (US) for international business machines corporation, Charles E. Beller of Baltimore MD (US) for international business machines corporation
IPC Code(s): G06F16/2453, G06F16/248, G06F40/169, G06F40/40
Abstract: a method for automatically annotating unstructured computer content associated with computer resources with additional contextual information from structured computer data sources is provided. the method may include, automatically identifying data elements within the unstructured computer content and matching extraction templates to the data elements. the method may further include automatically extracting an entity from the data elements using the extraction templates. the method may further include querying the structured computer data sources using the extracted entity to identify a data record in the structured computer data sources matching the entity. the method may further include extracting data from the data record and generating natural language text using the extracted data. the method may further include automatically annotating the unstructured computer content with the additional contextual information by inserting the generated natural language text into the unstructured computer content.
Inventor(s): Victor Lara of Chino Hills CA (US) for international business machines corporation, Steven Gans of Toronto (CA) for international business machines corporation, Miguel Angel Gonzalez of Santa Clara CA (US) for international business machines corporation, James Peter Griffin of Boylston MA (US) for international business machines corporation
IPC Code(s): G06K9/62
Abstract: using a graphical user interface (gui), a user is guided to generate a logical graph that represents how real data is generated in a situation. the situation is simulated using an artificial intelligence (ai) model a number of times by having the ai model choose paths through the logical graph to generate synthetic data that is representative of the real data. the ai model may also use a reward table that the user is guided to generate via the gui to execute the simulation, wherein the reward table incentivizes certain paths of the logical graph, and agents of the ai model are trained using the values of this reward table. this synthetic data generated via the ai model can be used for training other ai models.
Inventor(s): June-Ray Lin of Taipei City (TW) for international business machines corporation, Narayana Aditya Madineni of Bundall (AU) for international business machines corporation
IPC Code(s): G06F21/56, G06N7/00
Abstract: one or more systems, devices, computer program products and/or computer-implemented methods of use provided herein relate to generating a security threat prediction. a system can comprise a memory that stores computer executable components, and a processor that executes the computer executable components stored in the memory. the computer executable components can comprise a prediction component that analyzes a public data graph model to generate a primary security threat determination, wherein the prediction component can further generate a secondary security threat prediction based on the primary security threat determination and on a proprietary data graph model, wherein the proprietary data graph model comprises proprietary security threat data from a source, and wherein the proprietary security threat data has been scrubbed of source-identifiers. an obtaining component can obtain an agreement from the source to share the proprietary security threat data with another source that has access to the proprietary data graph model.
Inventor(s): Anthony Saieva of New York NY (US) for international business machines corporation, Frederico Araujo of Mahopac NY (US) for international business machines corporation, Sanjeev Das of White Plains NY (US) for international business machines corporation, Michael Vu Le of Danbury CT (US) for international business machines corporation, Jiyong Jang of Chappaqua NY (US) for international business machines corporation
IPC Code(s): G06F21/57
Abstract: a method to test an os kernel interface, such as an ebpf helper function. the interface has a grammar that defines the kernel interface. testing is carried out using ebpf code that invokes and tests the interface using a fuzzing engine. to facilitate the process, additional user space code is configured to generate at least one kernel event that triggers the ebpf code to run, and to transform inputs from the fuzzing engine according to the grammar that defines the kernel interface. after loading the ebpf code into the os kernel, the user space code issues the kernel event that causes the ebpf code to run. in response, and as the fuzzing engine executes, the ebpf code records arguments sent to the os kernel through the kernel interface. the arguments are passed through a data structure shared by the ebpf code and the user space code. by recording the arguments and other diagnostic information, the security of the kernel interface is evaluated.
Inventor(s): Varadarajan Ramamoorthy of Cary NC (US) for international business machines corporation, Danny Soroker of Larchmont NY (US) for international business machines corporation, Marshall Allen Lamb of Raleigh NC (US) for international business machines corporation
IPC Code(s): G06F21/62, G06F16/9035, G06F16/9038, G06F16/93, G06F21/60, G06Q20/36
Abstract: according to one embodiment, a method, computer system, and computer program product for tagging and sharing limited views of content. the embodiment may include identifying one or more roles corresponding to one or more users. the embodiment may also include determining a set of tags corresponding to sections of a document. the embodiment may further include associating tags from the set of tags with associated roles from the one or more roles. the embodiment may also include filtering a view of the document for a user from the one or more users according to the tags from the set of tags, the associated roles, and a set of roles corresponding to the user. the embodiment may further include presenting the view of the document to the user.
Inventor(s): Steven Joseph KURTZ of Austin TX (US) for international business machines corporation, Michael Henry SITKO of Jericho VT (US) for international business machines corporation, Rahul M. RAO of Bangalore (IN) for international business machines corporation, Sanjay UPRETI of Lexington KY (US) for international business machines corporation, Ajith Kumar Madathil CHANDRASEKARAN of Bangalore (IN) for international business machines corporation
IPC Code(s): G06F30/327, G06F30/337
Abstract: a method, system, and computer program product are disclosed for implementing enhanced noise impact on function (niof) analysis of an ic design having nets in multiple different variable voltage domains next to each other and modeling all multiple worst-case victim-aggressor voltage configurations in a single run leveraging noise abstracts characterized at a single voltage corner. the niof analysis enables accurately identifying incorrect victim switching or functional fails, effectively and efficiently providing design verification and the ability to sign-off an ic design with a single run, and enable modifying an integrated circuit design to fix niof failures, and fabricating an integrated circuit.
Inventor(s): Benjamin Neil Trombley of Hopewell Junction NY (US) for international business machines corporation, Chung-Lung K. Shum of Wappingers Falls NY (US) for international business machines corporation, Paul G. Villarrubia of Austin TX (US) for international business machines corporation, K. Paul Muller of Wappingers Falls NY (US) for international business machines corporation, Michael Hemsley Wood of Wilmington DE (US) for international business machines corporation, Daniel Arthur Gay of Lagrangeville NY (US) for international business machines corporation, Hua Xiang of San Jose CA (US) for international business machines corporation, Karl Evan Smock Anderson of Poughkeepsie NY (US) for international business machines corporation, Erica Stuecheli of Austin TX (US) for international business machines corporation, Michael Alexander Bowen of Poughkeepsie NY (US) for international business machines corporation, Randall J. Darden of Ridgedale MO (US) for international business machines corporation
IPC Code(s): G06F30/392, G06F30/398
Abstract: a method, system, and computer program product for bit flip aware latch placement in integrated circuit generation are provided. the method identifies a chip design for an integrated circuit. a set of chip design constraints, associated with the chip design, is identified. a set of checking groups, associated with a plurality of latches to be placed in the chip design, is determined. based on the set of chip design constraints and the set of checking groups, a placement scheme for the plurality of latches is selected. the method places the plurality of latches within the chip design based on the placement scheme and the set of checking groups.
Inventor(s): Muhtar Burak Akbulut of Waban MA (US) for international business machines corporation, Pankaj Dhoolia of Ghaziabad (IN) for international business machines corporation, Dan O'Connor of Milton MA (US) for international business machines corporation, Andy James Stoneberg of Clarksburg MA (US) for international business machines corporation, Venkat Raghavan Ganesh Sekar of Lowell MA (US) for international business machines corporation
IPC Code(s): G06F40/35, H04L51/02
Abstract: a plurality of constraints associated with conversational steps implemented by a conversation model is extracted from the conversation model. using the conversational steps and the constraints, a directed graph is constructed, each node in the directed graph representing a conversational step, each directed edge in the directed graph representing a possible execution path from a first conversational step to a second conversational step. an edge in the graph is populated with flow data denoting a probability associated with the edge. by traversing a portion of the graph, an experience preview is generated, the experience preview demonstrating a user experience of a portion of the conversation model.
Inventor(s): Kohei Miyaguchi of Tokyo (JP) for international business machines corporation, Takayuki Katsuki of Tokyo (JP) for international business machines corporation, Akira Koseki of Tokyo (JP) for international business machines corporation, Toshiya Iwamori of Tokyo (JP) for international business machines corporation
IPC Code(s): G06N3/04, G06N3/08
Abstract: a computer-implemented method is provided for learning with incomplete data in which some of entries are missing. the method includes acquiring an incomplete set of covariates including incomplete features {tilde over (x)} and an incomplete pattern m indicating missing entries of the incomplete set of covariates {tilde over (x)}. the method further includes obtaining, by a hardware processor, a predictive distribution p(y|) of an outcome y by using the incomplete set of covariates and a parameter �, the parameter � being unknown. a learning of the parameter � includes performing a maximization by maximizing a stochastically approximated conditional evidence lower bound. the stochastically approximated conditional evidence lower bound includes a density ratio which is controlled by transforming a portion of parameters of the stochastically approximated conditional evidence lower bound to keep a gradient of the stochastically approximated conditional evidence lower bound below a threshold during the maximization.
Inventor(s): Niharika DSouza of San Jose CA (US) for international business machines corporation, Tanveer Syeda-Mahmood of Cupertino CA (US) for international business machines corporation, Andrea Giovannini of Zurich (CH) for international business machines corporation, Antonio Foncubierta Rodriguez of Zurich (CH) for international business machines corporation
IPC Code(s): G06N3/08, G06N3/04
Abstract: a computer implemented method includes transforming a set of received samples from a set of data into a multiplexed graph, by creating a plurality of planes, each plane having the set of nodes and the set of edges. each set of edges is associated with a given relation type from the set of relation types. message passing walks are alternated within and across the plurality of planes of the multiplexed graph using a graph neural network (gnn) layer. the gnn layer has a plurality of units where each unit outputs an aggregation of two parallel sub-units. sub-units include a typed gnn layer that allows different permutations of connectivity patterns between intra-planar and inter-planar nodes. a task-specific supervision is used to train a set of weights of the gnn for the machine learning task.
Inventor(s): Yosef MOATTI of Haifa (IL) for international business machines corporation, Guy KHAZMA of Ramat Gan (IL) for international business machines corporation, Paula Kim TA-SHMA of Tel Aviv-Jaffa (IL) for international business machines corporation
IPC Code(s): G06N3/08
Abstract: a hub of a computing environment obtains a training set from an edge of the computing environment. the training set that is obtained includes data from the edge and is used to train a neural network at the hub. the training of the neural network provides a detector and a generator at the hub. a determination is made as to whether the training of the neural network is complete. based on determining that the training of the neural network is complete, the detector is sent to the edge. the detector at the edge is to facilitate suppression of additional edge data to the hub based on the detector at the edge determining that the additional edge data is statistically similar, based on one or more selected criteria, to data used to train the neural network.
Inventor(s): Dinesh C. Verma of New Castle NY (US) for international business machines corporation, Franck Vinh Le of West Palm Beach FL (US) for international business machines corporation, Michele Merler of New York City NY (US) for international business machines corporation, Dhiraj Joshi of Edison NJ (US) for international business machines corporation, SUPRIYO CHAKRABORTY of White Plains NY (US) for international business machines corporation, Seraphin Bernard Calo of Cortlandt Manor NY (US) for international business machines corporation
IPC Code(s): G06N3/08, G06K9/62
Abstract: a system may receive an existing base set of knowledge, train a neural network on the base set of knowledge, deploy the neural network on a new data set, generate, using the deployment, instances of new knowledge, and validate the instances of new knowledge.
Inventor(s): Arindam Jati of Bangalore (IN) for international business machines corporation, Vijay Ekambaram of Chennai (IN) for international business machines corporation, Sumanta Mukherjee of Bangalore (IN) for international business machines corporation, Brian Leo Quanz of YORKTOWN HEIGHTS NY (US) for international business machines corporation, Pavithra Harsha of White Plains NY (US) for international business machines corporation
IPC Code(s): G06N5/02
Abstract: an example operation may include one or more of storing a hierarchical data set, receiving a plurality of predicted outputs from a plurality of nodes in a distributed computing environment, respectively, wherein each predicted output is generated by a different node via execution of a time-series forecasting model on a different subset of lowest level data in the hierarchical data set, combining the plurality of predicted outputs via bottom-up aggregation to generate one or more additional predicted outputs for the time-series forecasting model based on one or more levels above the lowest level in the hierarchical time-series data set, determining error values for the time-series forecasting model at each level of the hierarchical data set based on the received and the one or more additional generated predicted outputs, and modifying a parameter of the time-series forecasting model based on the determined error values.
Inventor(s): Zachary A. Silverstein of Georgetown TX (US) for international business machines corporation, Hernan A. Cunico of Holly Springs NC (US) for international business machines corporation, Jonathan D. Dunne of Dungarvan (IE) for international business machines corporation, Nageswara Sastry Renduchintala of Bengaluru (IN) for international business machines corporation
IPC Code(s): G06N5/02
Abstract: a computer implemented method processes log events. a computer system determines dependence and independence of training log events. the computer system clusters the training log events with determined dependence and independence to form clustered training log events. the computer system generates an event association model using the clustered training log events. the computer system clusters the log events using the event association model.
Inventor(s): Ruchi Mahindru of Elmsford NY (US) for international business machines corporation, Ashish Ghodasara of Cary NC (US) for international business machines corporation, Harshit Kumar of Delhi (IN) for international business machines corporation
IPC Code(s): G06N5/02
Abstract: deriving augmented knowledge defining a knowledge base by extracting entities from a plurality of heterogeneous data sources; and augmenting the extracted entities; and utilizing an augmented entity to enhance a user activity.
Inventor(s): Muir Kumph of Croton on Hudson NY (US) for international business machines corporation, Oliver Dial of Yorktown Heights NY (US) for international business machines corporation, John Michael Cotte of New Fairfield CT (US) for international business machines corporation, David Abraham of Croton NY (US) for international business machines corporation
IPC Code(s): G06N10/40, H01R12/72, H02J50/05
Abstract: a quantum computing chip device provides an edge based capacitive, intra-chip connection. a first chip includes a first signal line with a distal end positioned proximate to or on an edge of the first chip and a proximal end positioned away from the edge of the first chip. a second chip includes a second signal line with a distal end positioned proximate to or on an edge of the second chip and a proximal end positioned away from the edge of the second chip. the first signal line and the second signal line are configured to conduct a signal. the second signal line of the second chip is disposed in alignment for a capacitive bus connection to the first signal line of the first chip.
Inventor(s): Lin Dong of Beijing (CN) for international business machines corporation, Jun Feng Liu of Ontario (CA) for international business machines corporation
IPC Code(s): G06N20/00, G06F9/50
Abstract: a computer-implemented method for training a machine learning model includes receiving a first training job at a processing device of a computer system having a plurality of graphics processing unit (gpu) resources, the first training job being part of a set of training jobs, and determining an amount of available memory in each gpu resource of the plurality of gpu resources. the method also includes loading the training job into one or more gpu resources with at least one second training job. the loading includes determining a cost model indicating an efficiency cost of each of a plurality of packing patterns, and packing the first training job and the second training job into the one or more gpu resources according to a packing pattern associated with a lowest efficiency cost.
Inventor(s): FAN JING Meng of Beijing (CN) for international business machines corporation, Cheng Luo of Beijing (CN) for international business machines corporation, Qi Ye of Shanghai (CN) for international business machines corporation, Jia Tian Zhong of Beijing (CN) for international business machines corporation
IPC Code(s): G06N20/00, G06F16/28, G06N5/02
Abstract: a method, computer system, and a computer program product for data compression is provided. the present invention may include receiving operational data. the present invention may include profiling the operational data using one or more normalizing functions. the present invention may include extracting a plurality of patterns from the operational data. the present invention may include compressing the operational data based on the plurality of patterns extracted.
Inventor(s): Manjit Singh Sodhi of Bangalore (IN) for international business machines corporation, Suja Mohandas of Palakkad (IN) for international business machines corporation, Nitin Gupta of Saharanpur (IN) for international business machines corporation, Kalapriya Kannan of Bangalore (IN) for international business machines corporation, Prerna Agarwal of New Delhi (IN) for international business machines corporation
IPC Code(s): G06N20/00, G06K9/62
Abstract: recommending machine learning models is provided. the method comprises training machine learning models, wherein each machine learning model is trained with a unique respective dataset. metadata associated with each machine learning model is extracted, wherein the metadata includes properties of the respective dataset used to train the machine learning model. the machine learning models and metadata are stored in a model catalog. upon receiving a new dataset, similarity scores are calculated between the new dataset and the machine learning models in the model catalog according to the properties of the datasets in the metadata of the machine learning models. a closest match machine learning model is identified from the model catalog for the new dataset according to similarity score. responsive to a determination that the closest match machine learning model exceeds a similarity threshold, predictions for the new dataset are generated with the closest match machine learning model.
Inventor(s): Julian Bertram Kuehnert of Nairobi (KE) for international business machines corporation, Sekou Lionel Remy of Nairobi (KE) for international business machines corporation, Aisha Walcott of Nairobi (KE) for international business machines corporation, Catherine H. Crawford of Bedford NH (US) for international business machines corporation
IPC Code(s): G06Q10/06, G06Q10/10
Abstract: a method, computer system, and a computer program product for integrating uncertainty quantifications into a long-term risk based calendar is provided. the present invention may include receiving data for an organization. the present invention may include generating a long-term risk based calendar using the data received for the organization. the present invention may include presenting the long-term risk based calendar to a plurality of user associated with the organization. the present invention may include providing one or more recommendations to at least one of the plurality of users.
Inventor(s): Nosaiba Dar Mousa of Wappingers Falls NY (US) for international business machines corporation
IPC Code(s): G06Q10/00, G06Q10/04, G06Q10/08
Abstract: making real-time operational decisions for remanufacturing operations by receiving data on return product including analysis of return product quality, and configuring the return product meeting quality threshold to commodity level. at least one dynamic optimization models is developed from data on the return product. a plan is created for a remanufacturing-oriented process from the at least one dynamic optimization models. the dynamic plan declares all activists required to build final product including all alteration and other activities such as disassembly, assembly, quantity needed from each return and replenishment quantity of new commodity. a final product is matched to an inventory of return product based on the plan for the remanufacturing-oriented process to provide a configuration recommendation.
Inventor(s): Raghuveer Prasad Nagar of Kota (IN) for international business machines corporation, Reji Jose of Bangalore (IN) for international business machines corporation, Vivek Arya of Bangalore (IN) for international business machines corporation, Archana Suri of Bangalore (IN) for international business machines corporation
IPC Code(s): G06Q30/02, G06Q30/06
Abstract: generation of pricing and promotions for personalized sale of an item includes receiving ordering data associated with an item from a user using an electronic shopping platform accessed via a user device. a failure of the user to complete a purchase order is determined using shopping cart activities of an ordering system. based on a search pattern of the user received from the ordering system, a price of the item is identified as causing the determined failure of the user to complete the purchase order. within a predefined time interval from the determined failure, a price range for the item is generated including a confidence score derived based on the search pattern of the user. based on the confidence score of the generated price range exceeding a threshold, a final price recommendation for the item is generated and communicated to the user device.
Inventor(s): Jeremy R. Fox of Georgetown TX (US) for international business machines corporation, Shikhar Kwatra of San Jose CA (US) for international business machines corporation, Smitkumar Narotambhai Marvaniya of Bangalore (IN) for international business machines corporation
IPC Code(s): G06Q30/06
Abstract: techniques are described with respect to a system, method, and computer product for improving product demand. an associated method includes generating a food profile based on a food inventory of a user the food inventory available to a computing device in a computer-accessible form; and identifying at least one food recipe based on the food profile, the food recipe available in a computer-accessible form. the method further includes determining a plurality of food items associated with the food inventory; identifying one or more absent food items associated with the at least one food recipe from the plurality of food items, the one or more absent food items being absent from the food inventory; and communicating to the user that the one or more absent food items are absent from the food inventory.
Inventor(s): Tiberiu Suto of Franklin NY (US) for international business machines corporation, Shikhar Kwatra of San Jose CA (US) for international business machines corporation, Nadiya Kochura of Bolton MA (US) for international business machines corporation, Ayush Khandelwal of Cambridge MA (US) for international business machines corporation, Jeremy R. Fox of Georgetown TX (US) for international business machines corporation
IPC Code(s): G06Q40/04, G06F21/10, G06Q20/36, G06Q20/38, G06Q20/40, H04L9/00, H04L9/32
Abstract: a computer-implemented method for digital asset transaction is disclosed. the computer-implemented method includes determining that a licensed material was used to generate a digital asset. the computer-implemented method further includes generating a smart contract for the digital asset, wherein one or more terms of the smart contract are based, at least in part, on one or more license terms associated with the licensed material. the computer-implemented method further includes identifying a transaction request for the digital asset. the computer-implemented method further includes authenticating the digital asset. the computer-implemented method further includes executing, in response to authenticating the digital asset, the generated smart contract for the digital asset.
Inventor(s): Thomas Guthrie Zimmerman of Cupertino CA (US) for international business machines corporation
IPC Code(s): G06T7/00
Abstract: respiratory protective device detection using optical tagging and image processing includes receiving one or more infrared images of a user. an optical tag is detected within the one or more infrared images. the optical tag is disposed on a respiratory protective device. a notification is generated indicating that the user is wearing a respiratory protective device in response to detecting the optical tag within the one or more infrared images. respiratory protective device detection also may include detecting eyes of the user within the one or more infrared images, determining a distance between the optical tag and the eyes of the user within the one or more infrared images, and comparing the distance with a threshold distance. the notification can indicate whether the respiratory protective device is covering a nose of the user based on the comparing.
Inventor(s): Yuan Yuan Ding of Shanghai (CN) for international business machines corporation, Zhong Fang Yuan of Xi'an (CN) for international business machines corporation, Tong Liu of Xi'an (CN) for international business machines corporation, Si Tong Zhao of Beijing (CN) for international business machines corporation, Yi Chen Zhong of Shanghai (CN) for international business machines corporation, Ziqiumin Wang of Shanghai (CN) for international business machines corporation
IPC Code(s): G06T11/00, G06F40/20
Abstract: techniques are described with respect to a system, method, and computer product for enhancement of socialization between one or more individuals wearing personal protective equipment. an associated method includes identifying a plurality of social communications between one or more individuals wearing personal protective equipment (ppe) and assigning an identifier to a participant associated with at least one of the social communications. the method further includes analyzing content of the at least one social communication and generating an augmented reality (ar) based representation of the content for presentation on an augmented reality device associated with the user, the augmented reality device presenting the content for visualization replacing ppe based at least in-part on the identifier.
Inventor(s): Stefano Braghin of Dublin (IE) for international business machines corporation, Killian Levacher of Dublin (IE) for international business machines corporation, Hessel Tuinhof of Dublin (IE) for international business machines corporation, Marco Simioni of Dublin (IE) for international business machines corporation
IPC Code(s): G06T11/40
Abstract: a system may receive inputs including a media, a targeted object keyword list, and a command. the system may feed expanded targeted object keywords into an object detector selector. the system may determine a target object area in the media, by the object detector selector using one or more object detector models. the system may feed the media, and the target object area into an area filler module. the system may generate a background, the area filler module in a target object area of the media.
Inventor(s): Kun Yan Yin of Ningbo (CN) for international business machines corporation, Xue Ping Liu of Beijing (CN) for international business machines corporation, Yun Jing Zhao of Beijing (CN) for international business machines corporation, Fei Wang of Dalian (CN) for international business machines corporation, Yu Tao Wu of Changshu (CN) for international business machines corporation, Yue Liu of Ningbo (CN) for international business machines corporation
IPC Code(s): G06T15/20, G06T15/04, G06T17/20, G06V10/46, G06V10/764, G06V10/774, G06V20/64, G06V20/70
Abstract: a computer-implemented method, system and computer program product for improving accuracy of a vision model. images of an object with a first set of perspectives are received from a dataset used to train the vision model. a three-dimensional model of the object is then generated using the images of the object from the dataset. using the three-dimensional model of the object, images of the object with a second set of perspectives are obtained. for example, the second set of perspectives may include different perspectives than the perspectives of the object from the images contained in the dataset. the dataset used to train the vision model may then be augmented with such images of the object with a second set of perspectives. in this manner, the dataset used to train the vision model includes a greater number of perspectives of the object thereby improving the accuracy of the vision model.
Inventor(s): Shikhar KWATRA of San Jose CA (US) for international business machines corporation, Smitkumar Narotambhai MARVANIYA of Bangalore (IN) for international business machines corporation, Jeremy R. FOX of Georgetown TX (US) for international business machines corporation
IPC Code(s): G06T19/00, G06T15/20
Abstract: provided are a computer program product, system, and method for determining an assignment of virtual objects to positions in a user field of view to render in a mixed reality display. a reward score for a virtual object is calculated based on an easiness score indicating an easiness to view the virtual object in previous interactions with the virtual object and frequency of interactions with the virtual object. the reward scores and the viewability scores for the positions are inputted into a virtual object placement program to output an assignment of the virtual objects to the positions. the assignment of the virtual objects to the positions are transmitted to the mixed reality display to cause the mixed reality display to render the virtual objects at the positions in the field of view of the user indicated in the assignment.
Inventor(s): Saraswathi Sailaja PERUMALLA of Visakhapatnam (IN) for international business machines corporation, Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation, Sugata Mazumdar of Bangalore (IN) for international business machines corporation
IPC Code(s): G06T19/00, G06T13/40, G06T19/20
Abstract: provided are techniques for chain of virtual reality content sharing with activity information. a first virtual reality (vr) content is received from a first node in a chain of nodes, wherein the first vr content includes a first avatar and interaction of the first avatar with the first vr content. it is determined whether a second user is interacting with the first vr content at a second node in the chain of nodes. in response to determining that the second user is interacting with the first vr content, a second vr content is created with an incremental update to the first vr content by: creating a second avatar and adding the second avatar and interaction of the second avatar with the first vr content to the first vr content. the second vr content is sent to a third node in the chain of nodes.
Inventor(s): Mauro MARZORATI of Lutz FL (US) for international business machines corporation, Carolina GARCIA DELGADO of Jalisco (MX) for international business machines corporation, Jeremy R. FOX of Georgetown TX (US) for international business machines corporation, Sarbajit K. RAKSHIT of Kolkata (IN) for international business machines corporation
IPC Code(s): G08G1/0965, G08G1/0967, G08G1/0968
Abstract: techniques are provided for the telematics operation of autonomous vehicles. in one embodiment, the techniques involve identifying an emergency situation and a corresponding emergency site, identifying a first vehicle and a first vehicle information, identifying a second vehicle and a second vehicle information, generating a mobility path of the first vehicle based on the first vehicle information and the second vehicle information, and upon determining that a first location of the second vehicle overlaps with an emergency location, transmitting commands to move the second vehicle to a second location.
Inventor(s): Raman HARISHANKAR of Blacklick OH (US) for international business machines corporation, Stan Kevin DALEY of Espanola NM (US) for international business machines corporation, Shami GUPTA of Bidhan Nagar (IN) for international business machines corporation, Sabyasachi Chatterjee of Bangalore (IN) for international business machines corporation, Sandipan Sengupta of Kolkata (IN) for international business machines corporation
IPC Code(s): G09B7/02, G06N5/02
Abstract: provided are techniques for assisting remote education learners. data is collected for an actual base environment, a simulated base environment, and an exam environment for a learner taking an exam. the collected data is used to generate a first behavior pattern for the learner in the simulated base environment and a second behavior pattern for the learner in the exam environment. in response to the second behavior pattern deviating beyond a threshold from the first behavior pattern, a classification of non-cognitive learners class is determined for the learner. a de-bias technique is applied to the classification to generate a final classification. in response to the final classification being the non-cognitive learners class, education material for a subject covered in the exam is selected, and the educational material is played on a remote learner computer of the learner.
Inventor(s): Pouya Hashemi of Purchase NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation
IPC Code(s): G11C11/16, H01L27/22, H01L43/02, H01L43/08, H01L43/12
Abstract: embodiments are disclosed for a three-terminal spin-orbit-torque (sot) magnetoresistive random access memory (mram) device. the three-terminal sot mram device includes a first type field effect transistor (fet) that drives an sot line. additionally, the first type fet includes a write gate in electrical contact with a write wordline (wwl). further, the device also includes a second type fet in electrical contact with a magnetic tunnel junction (mtj). also, the second type fet comprises a read gate in electrical contact with a read wordline (rwl). additionally, the first type fet is disposed above the second type fet. further, the three-terminal sot mram device provides a density of three contacted poly pitch (cpp) per two cells.
Inventor(s): William Ogallo of Nairobi (KE) for international business machines corporation, Julian Bertram Kuehnert of Nairobi (KE) for international business machines corporation, Sekou Lionel Remy of Nairobi (KE) for international business machines corporation, Isaiah Mulang' Onando of Nairobi (KE) for international business machines corporation
IPC Code(s): G16H50/30, G06N7/00
Abstract: methods, systems, and computer program products for predicting states from patient-caregiver dyadic biomarker data using artificial intelligence are provided herein. a computer-implemented method includes obtaining biomarker data derived from one or more dyads, each dyad comprising at least one patient and at least one caregiver associated with the at least one patient; determining, based on processing the obtained biomarker data, data-based representations of mental distress and/or social rhythm disruption among at least one of the one or more dyads; predicting mental distress and/or social rhythm disruption among a given dyad of at least one patient and at least one caregiver associated with the at least one patient by processing input biomarker data, derived from the given dyad, using artificial intelligence techniques in connection with at least a portion of the data-based representations; and performing automated actions based on the predicting.
Inventor(s): Brent A. Anderson of Jericho VT (US) for international business machines corporation, Nicholas Anthony Lanzillo of Wynantskill NY (US) for international business machines corporation, Lawrence A. Clevenger of Saratoga Springs NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Reinaldo Vega of Mahopac NY (US) for international business machines corporation, Albert M. Chu of Nashua NH (US) for international business machines corporation
IPC Code(s): H01L21/768, H01L23/522, H01L23/528
Abstract: an interconnect structure includes a first metal layer comprising at least one metal wire with a first segment and a local extension having a width in a first direction that is larger than a width of the first segment. a second metal layer is on top or below the first metal layer comprising at least one metal wire. a via is connected between the at least one metal wire of the first metal layer and the at least one metal wire of the second metal layer. a width of the via in the first direction is larger than the width of the first segment but smaller than a width of the second segment
Inventor(s): Tao Li of Slingerlands NY (US) for international business machines corporation, Liqiao Qin of Albany NY (US) for international business machines corporation, Devika Sarkar Grant of Amsterdam NY (US) for international business machines corporation, Nikhil Jain of Apple Valley MN (US) for international business machines corporation, Prabudhya Roy Chowdhury of Albany NY (US) for international business machines corporation, Sagarika Mukesh of Albany NY (US) for international business machines corporation, Kisik Choi of Watervliet NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation
IPC Code(s): H01L23/48, H01L29/08, H01L29/66
Abstract: a semiconductor structure includes a source/drain region; a frontside source/drain contact disposed on the source/drain region, a via-to-backside power rail disposed on the frontside source/drain contact and on a portion of the source/drain region, and a backside power rail connected to the via-to-backside power rail.
Inventor(s): Nicholas Anthony Lanzillo of Wynantskill NY (US) for international business machines corporation, Albert M. Chu of Nashua NH (US) for international business machines corporation, Lawrence A. Clevenger of Saratoga Springs NY (US) for international business machines corporation
IPC Code(s): H01L23/522, G06F30/392, H01L21/768, H01L23/528
Abstract: a semiconductor chip device includes a substrate with a first dielectric material of a first permittivity value. a power input line and ground line are positioned in the substrate and arranged to form a decoupling capacitor. a region of the substrate in between the power input line and the ground line is doped with a second dielectric material of a second permittivity value that is higher than the first permittivity value. the region doped with the second dielectric material lacks a signal body. by incorporating a region with higher permittivity, in what is generally unused space for power delivery, the region becomes a decoupling capacitor for nearby power delivery elements. by adding decoupling capacitance to the previously unused space, noise in a circuit is more easily controlled and the chip device becomes more reliable.
Inventor(s): Koichi Motoyama of Clifton Park NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Jennifer Church of Albany NY (US) for international business machines corporation, Oleg Gluschenkov of Tannersville NY (US) for international business machines corporation
IPC Code(s): H01L23/522, H01L21/768, H01L21/84, H01L23/528, H01L23/532
Abstract: semiconductor devices and methods of making the same include a first lower device and a second lower device on a substrate. a first upper device is over the first lower device and a second upper device is over the second lower device. a first lower contact extends from a height above the first upper device and makes electrical contact with a top surface and a sidewall surface of the first lower device. a second lower contact extends from a height above the second upper device and makes electrical contact with a top surface and a sidewall surface of the second lower device. an insulating barrier is between the first lower contact and the second lower contact.
Inventor(s): Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Daniel Charles Edelstein of White Plains NY (US) for international business machines corporation, Rajiv Joshi of Yorktown Heights NY (US) for international business machines corporation, Ravikumar Ramachandran of Pleasantville NY (US) for international business machines corporation, Eric Miller of Watervliet NY (US) for international business machines corporation
IPC Code(s): H01L23/528, H01L21/8234, H01L23/48, H01L23/522
Abstract: a semiconductor structure includes a front-end-of-line level including a plurality of field effect transistors electrically connected to a back-end-of-line interconnect level. the back-end-of-line interconnect level is located on a first side of the front-end-of-line level. a backside power rail is embedded within a backside interlayer dielectric located on a second side of the front-end-of-line level opposing the first side of the front-end-of-line level. the backside power rail is electrically connected to at least one field effect transistor of the plurality of field effect transistors. at least one backside field effect transistor is formed on a first semiconductor layer disposed, at least in part, above a passive device region. a first side of the passive device region is in contact with the first semiconductor layer and a second side of the passive device region, opposing the first side, is in contact with the back-end-of-line interconnect level.
Inventor(s): Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Koichi Motoyama of Clifton Park NY (US) for international business machines corporation, Nicholas Anthony Lanzillo of Wynantskill NY (US) for international business machines corporation, Chih-Chao Yang of Glenmont NY (US) for international business machines corporation
IPC Code(s): H01L23/528, H01L21/02, H01L21/28, H01L21/8238, H01L27/092, H01L29/06, H01L29/417, H01L29/423, H01L29/66, H01L29/775
Abstract: a first power rail directly below and connected to a source-drain epitaxy region of a positive field effect transistor (p-fet) region, a second power rail directly below and connected to a source-drain epitaxy region of a negative field effect transistor (n-fet) region, the first power rail and the second power rail each comprise vertical side surfaces which taper in an opposite direction from each other. forming a first power rail by subtractive metal etch, where the first power rail is directly below and connected to a source-drain epitaxy region of a p-fet region and forming a second power rail by damascene process, where the second power rail is directly below and connected to a source-drain epitaxy region of an n-fet region, the first power rail and the second power rail each comprise vertical side surfaces which taper in an opposite direction from each other.
Inventor(s): SOMNATH GHOSH of CLIFTON PARK NY (US) for international business machines corporation, FEE LI LIE of Albany NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Kisik Choi of Watervliet NY (US) for international business machines corporation
IPC Code(s): H01L23/528, H01L21/8234, H01L23/48, H01L23/522
Abstract: an approach to form a semiconductor structure with a plurality of buried power rails in a semiconductor substrate where at least one buried power rail extends below the backside of the semiconductor substrate. the semiconductor structure provides at least one portion of the first metal layer of the backside power delivery network that surrounds a bottom portion of the buried power rail below the backside of the semiconductor substrate. the bottom portion of the buried power rail is in direct contact with the portion of the first metal layer of the backside power delivery network where the buried power rail and the first metal layer are composed of the same conductive material. the semiconductor structure includes a portion of an interlayer dielectric material isolating the first metal layer of the backside power distribution network from the backside of the semiconductor substrate.
Inventor(s): Nicholas Anthony Lanzillo of Wynantskill NY (US) for international business machines corporation, Albert M. Chu of Nashua NH (US) for international business machines corporation, Brent A. Anderson of Jericho VT (US) for international business machines corporation, Lawrence A. Clevenger of Saratoga Springs NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Reinaldo Vega of Mahopac NY (US) for international business machines corporation
IPC Code(s): H01L23/528, H01L21/8234, H01L23/48, H01L23/522
Abstract: a method for forming a semiconductor device includes forming a front side of the semiconductor device, the front side comprising a metal wire m2, and a plurality of power rails coupled to the m2. further, the method includes forming a through silicon via (tsv) from a back side of the semiconductor device to the front side, the tsv connecting a first power rail of the front side with a metal wire m1 on the back side. further, the method includes forming a power delivery network on the back side, the tsv providing power from the power delivery network to the front side.
Inventor(s): Heng Wu of Santa Clara CA (US) for international business machines corporation, Chen Zhang of Guilderland NY (US) for international business machines corporation, Min Gyu Sung of Latham NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Julien Frougier of Albany NY (US) for international business machines corporation
IPC Code(s): H01L23/528, H01L21/768, H01L23/48, H01L23/522
Abstract: a semiconductor device a first device located on a frontside of a semiconductor substrate. the semiconductor device further includes an inductor located on a backside of the semiconductor substrate and integrated with a first backside metal (bsm) stack. the semiconductor device further includes a first electrical contact located between the frontside and the backside of the semiconductor substrate. a first end of the first electrical contact is connected to the first bsm stack and a second end of the first electrical contact is connected to a first source/drain region of the first device.
Inventor(s): Brent A. Anderson of Jericho VT (US) for international business machines corporation, Albert M. Chu of Nashua NH (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Nicholas Anthony Lanzillo of Wynantskill NY (US) for international business machines corporation, Lawrence A. Clevenger of Saratoga Springs NY (US) for international business machines corporation, REINALDO VEGA of Mahopac NY (US) for international business machines corporation
IPC Code(s): H01L23/528, H01L29/417, H01L29/78
Abstract: a vtfet is on a wafer and a backside power delivery network is on a backside of the wafer. a first backside contact is connected to a gate of the vtfet and a first portion of the backside power delivery network. the vtfet has a first width and the first width is a contacted poly pitch (cpp). the first backside contact may be at least the first width from the vtfet. the first backside contact may be double the first width from the vtfet.
Inventor(s): Lawrence A. Clevenger of Saratoga Springs NY (US) for international business machines corporation, Brent A. Anderson of Jericho VT (US) for international business machines corporation, Kisik Choi of Watervliet NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation
IPC Code(s): H01L23/528, H01L29/417
Abstract: a semiconductor device includes an isolation region and at least one transistor including a gate region, wherein the gate region is disposed on the isolation region. a via is disposed through a portion of the isolation region and on a signal line. a gate contact is disposed on the gate region. the via is connected to the gate contact and the signal line is connected to the gate region through the via and the gate contact.
Inventor(s): Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Nicholas Alexander Polomoff of Hopewell Junction NY (US) for international business machines corporation, Brent A. Anderson of Jericho VT (US) for international business machines corporation, Chih-Chao Yang of Glenmont NY (US) for international business machines corporation
IPC Code(s): H01L23/528, H01L21/768, H01L23/48, H01L29/417
Abstract: a semiconductor structure is presented including a device layer having a plurality of active devices, back-end-of-line (beol) components disposed under the device layer, a power distribution network (pdn) disposed over the device layer, and backside transistors disposed on a single crystal silicon (si) layer disposed over the pdn. a through silicon via (tsv) extends from the backside transistors disposed on the single crystal si layer through the beol. an upper tsv (utsv) extends from the pdn through the backside transistors disposed on the single crystal si layer to additional interconnects.
Inventor(s): Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Kisik Choi of Watervliet NY (US) for international business machines corporation, Son Nguyen of Schenectady NY (US) for international business machines corporation, Nicholas Alexander Polomoff of Hopewell Junction NY (US) for international business machines corporation
IPC Code(s): H01L23/528, H01L29/06, H01L29/40, H01L29/417, H01L29/423, H01L29/66, H01L29/775
Abstract: a semiconductor device includes a frontside including first metal structures, transistors disposed between the frontside and a backside opposite the frontside, each transistor including a source/drain positioned within a stack of nanolayers, the stack of nanolayers forming a gate structure and a power circuit on the backside and connected to the transistors by backside contacts. a backside dielectric isolation has a horizontal portion along a backside of the gate structure and a vertical portion substantially perpendicular to the backside and self-aligned to selected source/drains to electrically isolate the power circuit from the transistors.
Inventor(s): Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Koichi Motoyama of Clifton Park NY (US) for international business machines corporation, Feng Liu of Niskayuna NY (US) for international business machines corporation
IPC Code(s): H01L23/528, H01L21/8238, H01L27/092, H01L29/06, H01L29/417, H01L29/423, H01L29/66, H01L29/775
Abstract: a semiconductor structure includes a first via-to-backside power rail having a lower portion and an upper portion. the lower portion is connected to a first backside power rail and has a first width and the upper portion has a second width less than the first width.
Inventor(s): Koichi Motoyama of Clifton Park NY (US) for international business machines corporation, Oscar van der Straten of Guilderland Center NY (US) for international business machines corporation, Chih-Chao Yang of Glenmont NY (US) for international business machines corporation
IPC Code(s): H01L23/532, H01L23/528
Abstract: an interconnect structure includes a diffusion barrier layer disposed on exterior surfaces of an opening in a dielectric layer. a top surface of the diffusion barrier layer is below a top surface of the opening. a liner layer is disposed on a bottom surface and sidewalls of the diffusion barrier layer. a spacer layer is disposed on the top surface of the diffusion barrier layer and the liner layer and exposed sidewalls of the opening. an interconnect metal is disposed on the liner layer and the spacer layer. a metal cap is disposed on the interconnect metal.
Inventor(s): Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Daniel Schmidt of Niskayuna NY (US) for international business machines corporation, Tsung-Sheng Kang of Ballston Lake NY (US) for international business machines corporation, Alexander Reznicek of Troy NY (US) for international business machines corporation
IPC Code(s): H01L29/06, H01L21/8234, H01L23/48, H01L29/08, H01L29/66, H01L29/775, H01L29/786
Abstract: a semiconductor device includes a nanosheet stack on a substrate. a first source/drain is on a first side of the nanosheet stack and a second source/drain is on an opposing side of the nanosheet stack. a backside contact includes a first contact end on a first end of the first source/drain and an opposing second contact end in electrical communication with a backside power distribution network. a frontside contact includes a first contact end on a first end of the second source/drain and an opposing second contact end in electrical communication with a backend of line (beol) interconnect. a placeholder extends from an opposing second end of the second source/drain.
Inventor(s): Shahab Siddiqui of Clifton Park NY (US) for international business machines corporation, Ruqiang Bao of Niskayuna NY (US) for international business machines corporation, Charlotte DeWan Adams of Schenectady NY (US) for international business machines corporation, Curtis S. Durfee of Schenectady NY (US) for international business machines corporation, Anthony I. Chou of Guilderland NY (US) for international business machines corporation, Barry Paul Linder of Hastings-on-Hudson NY (US) for international business machines corporation, Ravikumar Ramachandran of Pleasantville NY (US) for international business machines corporation, Dechao Guo of Niskayuna NY (US) for international business machines corporation
IPC Code(s): H01L29/06, H01L21/8234, H01L29/66, H01L29/775, H01L29/78
Abstract: a semiconductor device includes a substrate having a first region and a second region separated from the first region by distance to define a space therebetween. a first semiconductor device including a gate dielectric is on the first region. the first semiconductor device can implement a finfet-based input/output (i/o) device in the first region. a second semiconductor device excluding a gate dielectric is on the second region. the second semiconductor device can implement a nanosheet-based logic device in the second region.
Inventor(s): Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Tsung-Sheng Kang of Ballston Lake NY (US) for international business machines corporation, Daniel Schmidt of Niskayuna NY (US) for international business machines corporation, Alexander Reznicek of Troy NY (US) for international business machines corporation
IPC Code(s): H01L29/417, H01L21/768, H01L23/528, H01L29/40
Abstract: a semiconductor device includes a wafer having at least two source/drain (s/d) epi regions. a power rail is arranged on a backside of the wafer. a backside contact (bsca) has a first portion including a backside local interconnect configured to connect the s/d epi regions together. a plurality of frontside signal wires are connected to the backside local interconnect through a first front side contact.
Inventor(s): Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Kisik Choi of Watervliet NY (US) for international business machines corporation, Muthumanickam Sankarapandian of Niskayuna NY (US) for international business machines corporation, Shogo Mochizuki of Mechanicville NY (US) for international business machines corporation
IPC Code(s): H01L29/423, H01L27/12, H01L29/06, H01L29/40, H01L29/417, H01L29/66, H01L29/786
Abstract: self-aligned direct backside contacts by an epitaxy everywhere under source/drain region approach are provided. in one aspect, a semiconductor device includes: a field-effect transistor(s) on a backside interlayer dielectric; an epitaxial contact placeholder in the backside interlayer dielectric that directly contacts a first source/drain region of the field-effect transistor(s); and a self-aligned direct backside contact in the backside interlayer dielectric that directly contacts a second source/drain region of the field-effect transistor(s). the epitaxial contact placeholder extends a distance d into the backside interlayer dielectric from the first source/drain region, and the self-aligned direct backside contact extends a distance d into the backside interlayer dielectric from the second source/drain region, where d>d. the field-effect transistor(s) can include a stack of active layers surrounded by a gate, and the first/second source/drain regions on opposite sides thereof. a method of fabricating the present semiconductor device is also provided.
Inventor(s): Brent A. Anderson of Jericho VT (US) for international business machines corporation, Albert M. Chu of Nashua NH (US) for international business machines corporation, Lawrence A. Clevenger of Saratoga Springs NY (US) for international business machines corporation, Ruilong Xie of Niskayuna NY (US) for international business machines corporation, Nicholas Anthony Lanzillo of Wynantskill NY (US) for international business machines corporation, REINALDO VEGA of Mahopac NY (US) for international business machines corporation
IPC Code(s): H01L29/78, H01L27/02, H01L29/417
Abstract: a vertical-transport field-effect transistor (vtfet) is on a wafer. the vtfet has a first width. the first width is a contacted poly pitch (cpp). a bottom source/drain region of the vtfet extends at least the first width from the vtfet. a contact from a frontside of the vtfet is connected to the bottom source/drain region.
Inventor(s): Nir DRUCKER of Zichron Yaakov (IL) for international business machines corporation, Hayim SHAUL of Kfar Saba (IL) for international business machines corporation
IPC Code(s): H04L9/00, H04L9/06
Abstract: an example system includes a processor to partition an arithmetic circuit representing a homomorphically encrypted (he) code into a number of execution blocks. the processor can generate, for each of the number of execution blocks, manifests describing access patterns for a number of different machine environments. the processor can then dynamically execute the he code by selecting successive blocks to execute based on an access pattern calculated for the execution block corresponding to a detected current machine environment.
Inventor(s): Fang Lu of Billerica MA (US) for international business machines corporation, Tushar Agrawal of West Fargo ND (US) for international business machines corporation, Jeremy R. Fox of Georgetown TX (US) for international business machines corporation, Sarbajit K. Rakshit of Kolkata (IN) for international business machines corporation
IPC Code(s): H04L9/40
Abstract: facilitating transfer of data from a first machine and/or computing system to at least a second machine and/or computing system in instances where traditional data transfer methods (such as using a communications network) are not immediately feasible is achieved by identifying a triggering event for physical transport of data, collecting the data to be transported, and transferring the data. secure transfer of the collected data is achieved via encryption of the collected data.
Inventor(s): Leonid Rodniansky of Allston MA (US) for international business machines corporation, Tania Butovsky of Needham MA (US) for international business machines corporation, Mikhail Shpak of New York NY (US) for international business machines corporation
IPC Code(s): H04L9/40, H04L41/16, H04L43/0811
Abstract: techniques for identifying outlier application connections for computer security are described. these techniques include identifying one or more connections between a client application and one or more services, over a communication network, and determining to switch from an outlier connection learning phase to an outlier connection detection phase based on the identified or more connections, including determining, in real-time and based on a confidence level and a number of previously analyzed connections, to switch to the outlier connection detection phase. the techniques further include determining, based on the switch to the outlier connection detection phase, that a first connection of the identified one or more connections is an outlier connection, and acting to reduce a security risk relating to the first connection.
Inventor(s): Derek Brewer of Bowling Green OH (US) for international business machines corporation, Robert Wilhelm of Cheyenne WY (US) for international business machines corporation, Jon D Gullixson of Rochester MN (US) for international business machines corporation, Paul Llamas Virgen of Guadalajara (MX) for international business machines corporation
IPC Code(s): H04M1/72484, G06F9/455, H04M1/72451
Abstract: the invention discloses a computer-implemented method, computer program product, and computer system, for utilizing a hypervisor installed on a smartphone running separate virtual machines (vms), one configured for personal use and another for work use, thereby allowing for separate operating environments on one piece of hardware. the method includes receiving one or more notifications, or calls, on the smartphone and determining whether the one or more notifications, or calls, are during work hours. the method selects, automatically, the work vm as default if the one or more notifications, or calls, are during work hours. if the one or more notifications, or calls, are not during work hours, the method automatically selects the personal vm as default. the method further notifies a user to switch vms if the one or more notifications, or calls, occur during a time that is a non-default vm.
Inventor(s): Dhruv Khurana of Sandy Springs GA (US) for international business machines corporation, Kristin E. McNeil of Charlotte NC (US) for international business machines corporation, ITAI GORDON of Modiin (IL) for international business machines corporation, Radha Mohan De of Howrah (IN) for international business machines corporation
IPC Code(s): H04N21/8541, H04N21/442
Abstract: in an approach for enhancing an experience of a user listening to and/or watching an audio-visual content by modifying future audio and/or video frames of the audio-visual content, a processor captures a set of sensor data from an iot device worn by the first user. a processor analyzes the set of sensor data to generate one or more connotations by converting the emotion using an emotional vector analytics technique and a supervised machine learning technique. a processor scores the one or more connotations on a basis of similarity between the emotion exhibited by the first user and an emotion expected to be provoked by a second user. a processor determines whether a score of the one or more connotations exceeds a pre-configured threshold level. responsive to determining the score does not exceed the pre-configured threshold level, a processor generates a suggestion for the producer of the audio-visual content.
Inventor(s): Changchang Liu of White Plains NY (US) for international business machines corporation, Wei-Han Lee of White Plains NY (US) for international business machines corporation, Shiqiang Wang of White Plains NY (US) for international business machines corporation, Seraphin Bernard Calo of Cortlandt Manor NY (US) for international business machines corporation, Dinesh C. Verma of New Castle NY (US) for international business machines corporation
IPC Code(s): H04W16/18, H04B17/318, H04W4/021, H04W24/08
Abstract: computer-implemented methods for drone-assisted communications networks are provided. aspects include collecting, from one or more sensing drones, signal strength information for a communications network in a geographic area and creating, based at least in part on the signal strength information, a signal strength map for the geographic area. aspects also include deploying one or more networking drones into the geographic area, wherein a location of the one or more drones in the geographic area is determined based at least in part on the signal strength map. the one or more networking drones are configured to provide access to the communications network.
Inventor(s): Joseph Prisco of Rochester MN (US) for international business machines corporation, Jacob Dixon of Rochester MN (US) for international business machines corporation, Marvin M. Misgen of Rochester MN (US) for international business machines corporation, Michael Paul Petrich of Rochester MN (US) for international business machines corporation
IPC Code(s): H05K9/00
Abstract: an information technology system includes a housing, electronics arranged within the housing, and a flexible shield arranged within the housing. the electronics emit electromagnetic interference. the flexible shield is arranged such that at least some of the electromagnetic interference is incident upon a surface of the flexible shield. the flexible shield is configured to be alternately at rest and active. the surface of the flexible shield is substantially planar when the flexible shield is at rest and the surface of the flexible shield is undulating when the flexible shield is active.
Inventor(s): Oscar van der Straten of Guilderland Center NY (US) for international business machines corporation, Shanti Pancharatnam of Albany NY (US) for international business machines corporation, Chih-Chao Yang of Glenmont NY (US) for international business machines corporation
IPC Code(s): H01L43/02, H01L27/22, H01L43/12
Abstract: a semiconductor device including a magnetic tunnel junction (mtj) stack vertically aligned between an annular shaped bottom electrode and an annular shaped top electrode. a semiconductor device including a mtj stack, vertically aligned between an annular shaped bottom electrode and an annular shaped top electrode, and an encapsulation layer surrounding vertical side surfaces of the mtj stack, wherein the encapsulation layer does not surround the top electrode nor the bottom electrode. forming a bottom electrode in a first inter-layer dielectric, forming a reference layer on the first inter-layer dielectric and on the bottom electrode, forming a tunnel barrier layer on the reference layer, forming a free layer on the tunnel barrier layer and patterning the reference layer, the tunnel barrier layer and the free layer into a magnetic tunnel function (mtj) stack vertically aligned over the bottom electrode, while not patterning the bottom electrode nor the first inter-layer dielectric.
Inventor(s): Pouya Hashemi of Purchase NY (US) for international business machines corporation, Jonathan Zanhong Sun of Shrub Oak NY (US) for international business machines corporation
IPC Code(s): H01L43/04, H01L27/22, H01L43/06, H01L43/14
Abstract: a magnetoresistive random access memory (mram) structure is provided that includes a chiral spin-orbit-torque (sot) metal bottom electrode under the bottom magnetic free layer where the chiral sot metal bottom electrode is surrounded by a via dielectric. the chiral sot metal bottom electrode enables the charge current, spin current and spin polarization directions to be in the same direction which is perpendicular to the surface of the chiral sot via structure.
Inventor(s): Juntao Li of Cohoes NY (US) for international business machines corporation, Kangguo Cheng of Schenectady NY (US) for international business machines corporation, Carl Radens of LaGrangeville NY (US) for international business machines corporation, Ching-Tzu Chen of Ossining NY (US) for international business machines corporation
IPC Code(s): H01L45/00, H01L27/24
Abstract: a phase change memory structure with improved sidewall heater and formation thereof may be presented. phase change materials are capable of being switched between a first structural state in which the material is in a generally amorphous solid phase, and a second structural state in which the material is in a generally crystalline solid phase in the active region of the cell. presented herein may be a side wall heater, where the upper section extends through bilayer dielectric to contact a phase change material layer and the lower section of the sidewall heater has conductive layers in contact with the bottom electrode. the width of the sidewall heater may reflect an inverted t shape reducing the current requirement to reset the phase change material.
INTERNATIONAL BUSINESS MACHINES CORPORATION patent applications on March 28th, 2024
- INTERNATIONAL BUSINESS MACHINES CORPORATION
- A61M16/06
- A61M16/00
- International business machines corporation
- B25J9/16
- B25J19/02
- B65G47/90
- B60L53/31
- B60L53/16
- B60L53/30
- B60W60/00
- G07C5/10
- C08J7/02
- C08J11/26
- C12M3/06
- B81B1/00
- B81C1/00
- C12M1/00
- G01N33/50
- F03D7/02
- F03D9/00
- H02S20/32
- G01C21/34
- G01C21/36
- G01R31/28
- G01R31/3187
- G06F13/40
- G05B13/02
- G05B19/4155
- G06F8/61
- G06F8/65
- G06F9/54
- G05D1/02
- G05F1/46
- G06F3/14
- G06T3/40
- G06T11/00
- H04N5/262
- G06F8/36
- G06F8/41
- G06F9/445
- G06F9/455
- G06F9/38
- G06F9/48
- G06N5/04
- G06F9/50
- H04L67/568
- H04L69/22
- G06F11/20
- G06F11/07
- G06F11/00
- G06F11/10
- G06F11/22
- G06F11/36
- G06F12/0891
- G06F12/0811
- G06F16/22
- G06F16/2455
- G06F16/28
- G06F16/2453
- G06F16/248
- G06F40/169
- G06F40/40
- G06K9/62
- G06F21/56
- G06N7/00
- G06F21/57
- G06F21/62
- G06F16/9035
- G06F16/9038
- G06F16/93
- G06F21/60
- G06Q20/36
- G06F30/327
- G06F30/337
- G06F30/392
- G06F30/398
- G06F40/35
- H04L51/02
- G06N3/04
- G06N3/08
- G06N5/02
- G06N10/40
- H01R12/72
- H02J50/05
- G06N20/00
- G06Q10/06
- G06Q10/10
- G06Q10/00
- G06Q10/04
- G06Q10/08
- G06Q30/02
- G06Q30/06
- G06Q40/04
- G06F21/10
- G06Q20/38
- G06Q20/40
- H04L9/00
- H04L9/32
- G06T7/00
- G06F40/20
- G06T11/40
- G06T15/20
- G06T15/04
- G06T17/20
- G06V10/46
- G06V10/764
- G06V10/774
- G06V20/64
- G06V20/70
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