FASTER MULTI-CELL READ OPERATION USING REVERSE READ CALIBRATIONS: abstract simplified (18117268)

• This abstract for appeared for patent application number 18117268 Titled 'FASTER MULTI-CELL READ OPERATION USING REVERSE READ CALIBRATIONS'

Simplified Explanation

The abstract describes a memory device that has a memory array with multiple memory cells connected to wordlines and bitlines. It also includes control logic that performs various operations. One operation involves determining a metadata value that represents the first read level voltage of the highest threshold voltage distribution of a subset of memory cells. This metadata value can be a count of failed bytes or failed bits. Based on this metadata value, the control logic adjusts the second read level voltage for the second-highest threshold voltage distribution of the same subset of memory cells. Finally, the control logic uses the adjusted second read level voltage to perform an initial calibrated read of the subset of memory cells by applying it to a wordline.

Original Abstract Submitted

A memory device having a memory array with a plurality of memory cells electrically coupled to a plurality of wordlines and a plurality of bitlines and control logic coupled with the memory array. The control logic perform operations including: determining a metadata value characterizing a first read level voltage of a highest threshold voltage distribution of a subset of the plurality of memory cells, wherein the metadata value comprises at least one of a failed byte count or a failed bit count; adjusting, based on the metadata value, a second read level voltage for a second-highest threshold voltage distribution of the subset of the plurality of memory cells; and causing, to perform an initial calibrated read of the subset of the plurality of memory cells, the adjusted second read level voltage to be applied to a wordline of the plurality of wordlines to read the second-highest threshold voltage distribution.