EFFICIENT CACHE PROGRAM OPERATION WITH DATA ENCODING: abstract simplified (18178105)

• This abstract for appeared for patent application number 18178105 Titled 'EFFICIENT CACHE PROGRAM OPERATION WITH DATA ENCODING'

Simplified Explanation

The abstract describes a memory device that uses control logic to program memory cells to specific levels. It generates signals to indicate when the host system should send data for programming operations to the memory device's input/output (I/O) data cache. The abstract also mentions the generation of encoded data values for each memory cell. Additionally, it mentions the use of a third data cache for storing data associated with a second programming operation. Signals are generated to indicate when the host system should send data for this second programming operation to the I/O data cache.

Original Abstract Submitted

Control logic in a memory device executes a first programming operation to program the set of memory cells to a set of programming levels. A first cache ready signal is generated, the first cache ready signal indicating to a host system to send first data associated with a second programming operation to an input/output (I/O) data cache of the memory device. A first encoded data value and a second encoded data value associated with each memory cell of the set of memory cells are generated. A second cache ready signal is generated, the second cache ready signal indicating to the host system to send second data associated with the next programming operation to the I/O data cache. The first data associated with the second programming operation is caused to be stored in a third data cache of the cache storage. A third cache ready signal is generated, the third cache ready signal indicating to the host system to send third data associated with the second programming operation to the I/O data cache.