Apple inc. (20240127758). Display with Silicon Gate Drivers and Semiconducting Oxide Pixels simplified abstract
Contents
- 1 Display with Silicon Gate Drivers and Semiconducting Oxide Pixels
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 Display with Silicon Gate Drivers and Semiconducting Oxide Pixels - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Original Abstract Submitted
Display with Silicon Gate Drivers and Semiconducting Oxide Pixels
Organization Name
Inventor(s)
Shinya Ono of Santa Clara CA (US)
Chin-Wei Lin of San Jose CA (US)
Chen-Ming Chen of Taoyuan City (TW)
Hassan Edrees of Santa Clara CA (US)
Display with Silicon Gate Drivers and Semiconducting Oxide Pixels - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240127758 titled 'Display with Silicon Gate Drivers and Semiconducting Oxide Pixels
Simplified Explanation
The patent application describes a display system with pixels controlled by gate drivers, using semiconducting oxide transistors for pixels and silicon transistors for gate drivers. The gate drivers include shift register and output buffer subcircuits, with independent clock signals for stability and speed optimization.
- Semiconducting oxide transistors used for pixels
- Silicon transistors used for gate drivers
- Gate drivers include shift register and output buffer subcircuits
- Independent clock signals for stability and speed optimization
Potential Applications
The technology described in the patent application could be used in various display devices such as televisions, monitors, smartphones, and tablets.
Problems Solved
This technology solves the problem of optimizing pulse widths for stability and speed in display systems, improving overall performance and efficiency.
Benefits
The benefits of this technology include enhanced display quality, improved energy efficiency, and increased reliability of the display system.
Potential Commercial Applications
The technology could be applied in the manufacturing of consumer electronics, medical devices, automotive displays, and industrial equipment.
Possible Prior Art
One possible prior art could be the use of shift registers and output buffers in display systems, but the specific implementation with semiconducting oxide transistors for pixels and silicon transistors for gate drivers may be novel.
Unanswered Questions
How does this technology compare to existing display systems in terms of power consumption and performance?
This article does not provide a direct comparison with existing display systems in terms of power consumption and performance. It would be interesting to see a detailed analysis of how this technology stacks up against current solutions.
What are the potential challenges in implementing this technology on a large scale for mass production?
The article does not address the potential challenges in implementing this technology on a large scale for mass production. It would be important to consider factors such as cost, scalability, and compatibility with existing manufacturing processes.
Original Abstract Submitted
a display may include an array of pixels that receive control signals from a chain of gate drivers. the pixels can be formed using semiconducting oxide transistors, whereas the gate drivers can be formed using silicon transistor. each gate driver may include a shift register subcircuit and an output buffer subcircuit. the shift register subcircuit may include a first set of transistors at least partially controlled by one or more shift register clock signals. the output buffer subcircuit may include a second set of transistors at least partially controlled by one or more output buffer clock signals. the output buffer clock signals can toggle independently from the shift register clock signals. operated in this way, the shift register clock signals can have pulse widths optimized for stability while the output buffer clock signals can have pulse widths optimized for speed.
