Advanced micro devices, inc. (20240111489). BIGNUM ADDITION AND/OR SUBTRACTION WITH CARRY PROPAGATION simplified abstract

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BIGNUM ADDITION AND/OR SUBTRACTION WITH CARRY PROPAGATION

Organization Name

advanced micro devices, inc.

Inventor(s)

Onur Kayiran of West Henrietta NY (US)

Michael Estlick of Ft. Collins CO (US)

Masab Ahmad of Austin TX (US)

Gabriel H. Loh of Bellevue WA (US)

BIGNUM ADDITION AND/OR SUBTRACTION WITH CARRY PROPAGATION - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240111489 titled 'BIGNUM ADDITION AND/OR SUBTRACTION WITH CARRY PROPAGATION

Simplified Explanation

The processing unit described in the abstract includes a combination of adders and carry bit generation circuits to efficiently add binary values of different lengths. The adders add binary portions of values and generate carry bits, while the carry bit generation circuits receive these carry bits and generate additional carry bits for further addition operations.

  • The processing unit includes a plurality of adders and carry bit generation circuits.
  • The adders add binary portions of values and generate carry bits.
  • The carry bit generation circuits receive and generate additional carry bits for further addition operations.
  • The processing unit is designed to handle binary values of different lengths efficiently.

Potential Applications

This technology could be applied in:

  • High-speed computing systems
  • Digital signal processing
  • Cryptography algorithms

Problems Solved

This technology solves:

  • Efficient addition of binary values of different lengths
  • Improved performance in processing units
  • Reduction of processing time for complex calculations

Benefits

The benefits of this technology include:

  • Faster computation speed
  • Enhanced accuracy in calculations
  • Reduced power consumption in processing units

Potential Commercial Applications

A potential commercial application for this technology could be in:

  • High-performance computing systems
  • Data centers
  • Financial institutions for complex calculations

Possible Prior Art

One possible prior art for this technology could be:

  • Carry-lookahead adder circuits
  • Ripple-carry adder designs

What are the specific design differences between this processing unit and traditional adder circuits?

The specific design differences include the integration of carry bit generation circuits to optimize the addition process and improve efficiency.

How does the processing unit handle overflow conditions during addition operations?

The processing unit utilizes the generated carry bits to manage overflow conditions and ensure accurate results in the addition operations.


Original Abstract Submitted

a processing unit includes a plurality of adders and a plurality of carry bit generation circuits. the plurality of adders add first and second x bit binary portion values of a first y bit binary value and a second y bit binary value. y is a multiple of x. the plurality of adders further generate first carry bits. the plurality of carry bit generation circuits is coupled to the plurality of adders, respectively, and receive the first carry bits. the plurality of carry bit generation circuits generate second carry bits based on the first carry bits. the plurality of adders use the second carry bits to add the first and second x bit binary portions of the first and second y bit binary values, respectively.