20240055393. PACKAGE-ON-PACKAGE ASSEMBLY WITH WIRE BOND VIAS simplified abstract (Invensas LLC)

PACKAGE-ON-PACKAGE ASSEMBLY WITH WIRE BOND VIAS

Organization Name

Invensas LLC

Inventor(s)

Ellis Chau of San Jose CA (US)

Reynaldo Co of Santa Cruz CA (US)

Roseann Alatorre of San Jose CA (US)

Philip Damberg of Cupertino CA (US)

Wei-Shun Wang of Palo Alto CA (US)

Se Young Yang of Cupertino CA (US)

PACKAGE-ON-PACKAGE ASSEMBLY WITH WIRE BOND VIAS - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240055393 titled 'PACKAGE-ON-PACKAGE ASSEMBLY WITH WIRE BOND VIAS

Simplified Explanation

The microelectronic package described in the patent application includes a substrate with a microelectronic element on its surface, electrically conductive elements connected to the microelectronic element, wire bonds with bases bonded to the conductive elements, and ends remote from the substrate. The wire bonds have tips with at least one dimension smaller than their diameters, and are partially covered by a dielectric encapsulation layer.

• Substrate with microelectronic element and electrically conductive elements
• Wire bonds with bases connected to conductive elements and tips with smaller dimensions
• Dielectric encapsulation layer covering portions of wire bonds
• Unencapsulated portions of wire bonds are exposed

1. 1. 1. Potential Applications

• Microelectronics packaging
• Semiconductor devices
• Integrated circuits

1. 1. 1. Problems Solved

• Protecting wire bonds from external elements
• Ensuring proper electrical connections
• Improving reliability of microelectronic packages

1. 1. 1. Benefits

• Enhanced protection for wire bonds
• Increased reliability of microelectronic packages
• Improved performance of semiconductor devices

Original Abstract Submitted

a microelectronic package includes a substrate having a first surface. a microelectronic element overlies the first surface. electrically conductive elements are exposed at the first surface of the substrate, at least some of which are electrically connected to the microelectronic element. the package includes wire bonds having bases bonded to respective ones of the conductive elements and ends remote from the substrate and remote from the bases. the ends of the wire bonds are defined on tips of the wire bonds, and the wire bonds define respective first diameters between the bases and the tips thereof. the tips have at least one dimension that is smaller than the respective first diameters of the wire bonds. a dielectric encapsulation layer covers portions of the wire bonds, and unencapsulated portions of the wire bonds are defined by portions of the wire bonds, including the ends, are uncovered by the encapsulation layer.