20240053897. FAST MEMORY CLEAR OF SYSTEM MEMORY simplified abstract (International Business Machines Corporation)
Contents
FAST MEMORY CLEAR OF SYSTEM MEMORY
Organization Name
International Business Machines Corporation
Inventor(s)
Bulent Abali of Tenafly NJ (US)
Alper Buyuktosunoglu of White Plains NY (US)
Craig R Walters of Highland NY (US)
Elpida Tzortzatos of Lagrangeville NY (US)
Bartholomew Blaner of Shelburne VT (US)
FAST MEMORY CLEAR OF SYSTEM MEMORY - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240053897 titled 'FAST MEMORY CLEAR OF SYSTEM MEMORY
Simplified Explanation
The patent application describes a method for clearing memory of a system in a computing environment using a zero-filled cache line with a single z-bit per entry in the cache directory.
- A zero-filled cache line with a single z-bit per entry in the cache directory is defined.
- The z-bit is a positive integer.
- A plurality of instruction set architecture (ISA) instructions are provided with a single z-bit in a cache line to clear an entire cache line.
Potential Applications
- Improving system performance by efficiently clearing memory in a computing environment.
- Enhancing cache management in systems where memory needs to be cleared frequently.
Problems Solved
- Inefficient memory clearing processes in computing systems.
- Lack of a streamlined method for clearing cache memory.
Benefits
- Faster and more efficient memory clearing process.
- Improved system performance by optimizing cache management.
Original Abstract Submitted
various embodiments are provided herein for clearing memory of system in a computing environment. a zero-filled cache line with a single z-bit per entry in the cache directory may be defined. the “z” is a positive integer. a plurality of instruction set architecture (“isa”) instructions are provided with a single z-bit in a cache line as defined in a cache directory to clear an entire cache line.
