20240049464. VERTICAL SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF simplified abstract (SK hynix Inc.)
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VERTICAL SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF
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VERTICAL SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240049464 titled 'VERTICAL SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF
Simplified Explanation
The patent application describes a method for fabricating a semiconductor device. Here is a simplified explanation of the abstract:
- The method involves creating an alternating stack by stacking layers of dielectric material and sacrificial material on a substrate.
- A vertical trench is formed to divide the upper multi-layered stack into dummy stacks.
- An asymmetric stepped trench is then formed, extending downward from the vertical trench to divide the lower multi-layered stack into a pad stack and a dummy pad stack.
- The asymmetric stepped trench includes a first stepped sidewall at the edge of the pad stack and a second stepped sidewall at the edge of the dummy pad stack, occupying less area than the first stepped sidewall.
Potential applications of this technology:
- Fabrication of semiconductor devices such as integrated circuits and transistors.
- Manufacturing of electronic components for various industries including telecommunications, consumer electronics, and automotive.
Problems solved by this technology:
- Provides a method for creating an alternating stack in a semiconductor device, allowing for improved performance and functionality.
- Enables the formation of vertical and asymmetric stepped trenches, which can be used for various purposes such as isolation, interconnects, and device integration.
Benefits of this technology:
- Enhanced device performance and functionality due to the precise formation of alternating stacks and trenches.
- Improved manufacturing efficiency and cost-effectiveness by utilizing a simplified fabrication process.
- Enables the development of smaller and more compact semiconductor devices with higher integration density.
Original Abstract Submitted
a method for fabricating semiconductor device includes forming an alternating stack that includes a lower multi-layered stack and an upper multi-layered stack by alternately stacking a dielectric layer and a sacrificial layer over a substrate, forming a vertical trench that divides the upper multi-layered stack into dummy stacks, and forming an asymmetric stepped trench that is extended downward from the vertical trench to divide the lower multi-layered stack into a pad stack and a dummy pad stack, wherein forming the asymmetric stepped trench includes forming a first stepped sidewall that is defined at an edge of the pad stack, and forming a second stepped sidewall that is defined at an edge of the dummy pad stack and occupies less area than the first stepped sidewall.
