20240047421. SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Chulwoo Kim of Incheon (KR)

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240047421 titled 'SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE

Simplified Explanation

The semiconductor package described in the patent application includes a package substrate, an interposer, semiconductor devices, first conductive connection members, and a molding member. The interposer has first bonding pads in individual mounting regions, and the semiconductor devices have chip pads that are electrically connected to the first bonding pads. The first conductive connection members are located between the first bonding pads and the chip pads. The molding member covers the semiconductor devices and fills the gaps between the interposer and the devices. One of the individual mounting regions includes a pad-free region with a cross shape and pad regions defined by the pad-free region, and the first bonding pads are located in the pad regions.

  • The semiconductor package includes a package substrate, interposer, semiconductor devices, conductive connection members, and a molding member.
  • The interposer has bonding pads in individual mounting regions, and the semiconductor devices have chip pads connected to the bonding pads.
  • The conductive connection members are between the bonding pads and chip pads.
  • The molding member covers the semiconductor devices and fills the gaps between the interposer and devices.
  • One of the mounting regions has a pad-free region with a cross shape and pad regions defined by it, where the bonding pads are located.

Potential Applications

  • Semiconductor packaging for electronic devices
  • Integrated circuits and microchips

Problems Solved

  • Ensuring electrical connections between semiconductor devices and interposer
  • Protecting semiconductor devices from external elements

Benefits

  • Improved electrical connectivity and reliability
  • Enhanced protection for semiconductor devices
  • Efficient use of space on the interposer


Original Abstract Submitted

a semiconductor package includes a package substrate, an interposer on the package substrate, semiconductor devices in individual mounting regions on a first surface of the interposer, respectively, first conductive connection members, and a molding member on the interposer. the interposer has first bonding pads in the individual mounting regions, respectively. the semiconductor devices each have chip pads electrically connected to the first bonding pads. the first conductive connection members are between the first bonding pads and the chip pads. the molding member covers the semiconductor devices and fills gaps between the first surface of the interposer and the semiconductor devices. at least one of the individual mounting regions includes a pad-free region with a cross shape and pad regions defined by the pad-free region, and the first bonding pads are in the pad regions.