20240044978. METHODS FOR DETERMINING AND CALIBRATING NON-LINEARITY IN A PHASE INTERPOLATOR AND RELATED DEVICES AND SYSTEMS simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)

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METHODS FOR DETERMINING AND CALIBRATING NON-LINEARITY IN A PHASE INTERPOLATOR AND RELATED DEVICES AND SYSTEMS

Organization Name

SAMSUNG ELECTRONICS CO., LTD.

Inventor(s)

Gunjan Mandal of Bengaluru (IN)

Sunil Rajan of Bengaluru (IN)

Raghavendra Molthati of Bengaluru (IN)

METHODS FOR DETERMINING AND CALIBRATING NON-LINEARITY IN A PHASE INTERPOLATOR AND RELATED DEVICES AND SYSTEMS - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240044978 titled 'METHODS FOR DETERMINING AND CALIBRATING NON-LINEARITY IN A PHASE INTERPOLATOR AND RELATED DEVICES AND SYSTEMS

Simplified Explanation

The patent application describes methods and systems for determining and calibrating non-linearity in a phase interpolator. The non-linearity refers to the deviation from an ideal linear relationship between the phase shift introduced by the phase interpolator and the input control code.

The innovation involves determining the non-linearity by measuring the jitter values that cause the bit error rate (BER) of a data sequence to exceed a predefined target BER. The recovered clock, obtained from a data pattern representing the data sequence, is aligned with the data sequence at a first phase interpolator (PI) code. The first jitter value is determined by finding the amount of jitter that causes the BER to exceed the target at the first PI code. Similarly, the second jitter value is determined at a second PI code.

The differential non-linearity (DNL) corresponding to the second PI code is then calculated based on the phase shift introduced to the recovered clock by the second PI code relative to the first PI code, the first jitter value, and the second jitter value. This process can be repeated for all PI codes to determine the DNL values corresponding to each code. Additionally, an integral non-linearity (INL) can be determined by integrating the DNL values for all PI codes.

Potential applications of this technology include:

  • High-speed communication systems that require accurate phase interpolation for data recovery.
  • Digital signal processing applications that rely on precise timing synchronization.

Problems solved by this technology include:

  • Addressing non-linearities in phase interpolators that can cause timing errors and degradation in data transmission.
  • Providing a method to calibrate and compensate for non-linearities in phase interpolators.

Benefits of this technology include:

  • Improved accuracy and reliability in data recovery and timing synchronization.
  • Enhanced performance and efficiency in high-speed communication systems.
  • Simplified calibration process for phase interpolators.


Original Abstract Submitted

methods and systems for determining and calibrating non-linearity in a phase interpolator. embodiments determine a first jitter value that causes the bit error rate (ber) of a data sequence to exceed a predefined target ber, when a recovered clock is aligned with the data sequence at a first pi code. the recovered clock is obtained from a data pattern representing the data sequence. embodiments determine a second jitter value that causes the ber of the data sequence to exceed the predefined target ber at a second pi code. the first pi code may immediately precede or succeed the second pi code. embodiments determine a differential non-linearity (dnl) corresponding to the second pi code, based on a phase shift introduced to the recovered clock by the second pi code relative to the first pi code, the first jitter value, and the second jitter value. all dnl values corresponding to all pi codes may be determined in a similar manner. an integral non-linearity (inl) may be determined by integrating the dnl corresponding to all pi codes.