20240036470. Method for Forming an Interconnect Structure simplified abstract (IMEC VZW)

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Method for Forming an Interconnect Structure

Organization Name

IMEC VZW

Inventor(s)

Waikin Li of Leuven (BE)

Zheng Tao of Heverlee (BE)

Method for Forming an Interconnect Structure - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240036470 titled 'Method for Forming an Interconnect Structure

Simplified Explanation

The patent application describes a method for forming an interconnect structure for an integrated circuit. The method involves several steps, including the formation of a metal layer over a substrate, a hard mask layer over the metal layer, and a first resist layer over the hard mask layer. The first resist layer is patterned to define a first resist pattern.

Next, a second resist layer of a different resist material is formed over the first resist pattern, and this layer is patterned to define a second resist pattern of resist lines extending in parallel along a first direction. The second resist pattern overlaps at least a portion of the first resist pattern.

The hard mask layer is then patterned using the second resist pattern as an etch mask, defining a hard mask line pattern underneath the second resist pattern. Subsequently, the metal layer is patterned using the hard mask line pattern as a mask, defining a metal line pattern underneath.

The second resist pattern is removed, and the hard mask line pattern is then patterned using at least a portion of the first resist pattern as an etch mask, defining a hard mask pillar pattern over the metal line pattern. Finally, a metal pillar pattern is formed according to the hard mask pillar pattern.

  • Metal layer is formed over a substrate.
  • Hard mask layer is formed over the metal layer.
  • First resist layer is formed and patterned to define a first resist pattern.
  • Second resist layer is formed and patterned to define a second resist pattern of resist lines.
  • Hard mask layer is patterned using the second resist pattern as an etch mask, defining a hard mask line pattern.
  • Metal layer is patterned using the hard mask line pattern as a mask, defining a metal line pattern.
  • Second resist pattern is removed.
  • Hard mask line pattern is patterned using at least a portion of the first resist pattern as an etch mask, defining a hard mask pillar pattern.
  • Metal pillar pattern is formed according to the hard mask pillar pattern.

Potential applications of this technology:

  • Integrated circuit manufacturing
  • Semiconductor industry

Problems solved by this technology:

  • Formation of precise interconnect structures in integrated circuits
  • Overlapping resist patterns to achieve desired patterns

Benefits of this technology:

  • Improved precision in interconnect structure formation
  • Enhanced control over the patterning process
  • Increased efficiency in integrated circuit manufacturing


Original Abstract Submitted

a method is provided for forming an interconnect structure for an integrated circuit. the method includes: forming a metal layer over a substrate; forming a hard mask layer over the metal layer; forming a first resist layer of a first resist material over the hard mask layer and patterning the first resist layer in a first lithography process to define a first resist pattern; forming over the first resist pattern a second resist layer of a second resist material different from the first resist material and patterning the second resist layer in a second lithography process to define a second resist pattern of resist lines extending in parallel along a first direction, wherein at least a portion of the first resist pattern is overlapped by the second resist pattern; patterning the hard mask layer using the second resist pattern as an etch mask to define a hard mask line pattern underneath the second resist pattern, and subsequently the metal layer to define a metal line pattern underneath the hard mask line pattern; removing the second resist pattern and subsequently patterning the hard mask line pattern using said at least a portion of the first resist pattern as an etch mask to define a hard mask pillar pattern over the metal line pattern; and forming a metal pillar pattern in accordance with the hard mask pillar pattern.