20240032303. THREE-DIMENSIONAL SEMICONDUCTOR DEVICE INCLUDING FERROELECTRIC TRANSISTOR simplified abstract (SAMSUNG ELECTRONICS CO., LTD.)
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THREE-DIMENSIONAL SEMICONDUCTOR DEVICE INCLUDING FERROELECTRIC TRANSISTOR
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THREE-DIMENSIONAL SEMICONDUCTOR DEVICE INCLUDING FERROELECTRIC TRANSISTOR - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240032303 titled 'THREE-DIMENSIONAL SEMICONDUCTOR DEVICE INCLUDING FERROELECTRIC TRANSISTOR
Simplified Explanation
The abstract describes a three-dimensional semiconductor device that includes various components such as a plate common source line, word lines, a channel pattern, a ferroelectric layer, a bit line, and a source line.
- The plate common source line is a part of the device that is in contact with the third portion of the ferroelectric layer.
- The first and second word lines are spaced apart and partially define a vertical space where the channel pattern and the ferroelectric layer are located.
- The ferroelectric layer has three portions: a first portion between the channel pattern and the first word line, a second portion between the channel pattern and the second word line, and a third portion contacting the plate common source line.
- The bit line is located in the vertical space and contacts the channel pattern. It has a narrower width in a horizontal direction compared to the source line.
- The source line is spaced apart from the bit line in the vertical space and contacts the channel pattern. It has a wider width in the horizontal direction compared to the bit line and includes a contact portion inside the plate common source line.
Potential applications of this technology:
- Three-dimensional semiconductor devices can be used in various electronic devices such as smartphones, tablets, and computers.
- The ferroelectric layer can be used for non-volatile memory applications, allowing for data retention even when power is turned off.
Problems solved by this technology:
- The three-dimensional structure of the device allows for increased integration and packing density, enabling more functionality in a smaller footprint.
- The use of a ferroelectric layer provides a non-volatile memory solution with low power consumption and high-speed operation.
Benefits of this technology:
- Improved performance and efficiency due to the three-dimensional structure and the use of a ferroelectric layer.
- Increased data storage capacity and reliability with the non-volatile memory capability.
- Potential cost savings in terms of manufacturing and energy consumption.
Original Abstract Submitted
a three-dimensional semiconductor device includes a plate common source line, first and second word lines spaced apart from each other to at least partially define a vertical space therebetween, a channel pattern in the vertical space, a ferroelectric layer including a first portion between the channel pattern and the first word line, a second portion between the channel pattern and the second word line, and a third portion contacting the plate common source line, a bit line in the vertical space to contact the channel pattern and having a first width in a first horizontal direction, and a source line spaced apart from the bit line in the vertical space to contact the channel pattern, having a second width greater than the first width in the first horizontal direction, and having a source line contact portion inside the plate common source line.
