20240030925. Digitally Calibrated Programmable Clock Phase Generation Circuit simplified abstract (AyDeeKay LLC dba Indie Semiconductor)

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Digitally Calibrated Programmable Clock Phase Generation Circuit

Organization Name

AyDeeKay LLC dba Indie Semiconductor

Inventor(s)

Robert W. Kim of Aliso Viejo CA (US)

Digitally Calibrated Programmable Clock Phase Generation Circuit - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240030925 titled 'Digitally Calibrated Programmable Clock Phase Generation Circuit

Simplified Explanation

The abstract describes an integrated circuit that includes a generating circuit, which can provide an edge clock with a target phase within a clock period of an input clock. The generating circuit does not include a delay-locked loop (DLL). It may include a programmable gated ring oscillator that provides a reference clock with a higher frequency than the input clock. The generating circuit also includes a control circuit that determines the number of edges of the reference clock within a reference period.

  • The integrated circuit includes a generating circuit that provides an edge clock with a specific phase within a clock period of an input clock.
  • The generating circuit does not use a delay-locked loop (DLL).
  • The generating circuit includes a programmable gated ring oscillator that generates a reference clock with a higher frequency than the input clock.
  • The gated ring oscillator can be programmed to adjust the frequency within a predefined range.
  • The generating circuit also includes a control circuit that determines the number of edges of the reference clock within a reference period.

Potential applications of this technology:

  • This integrated circuit can be used in various electronic devices that require precise timing synchronization.
  • It can be used in communication systems, data processing systems, and other applications where accurate clock signals are crucial.

Problems solved by this technology:

  • The integrated circuit provides an edge clock with a specific phase, allowing for precise timing control.
  • It eliminates the need for a delay-locked loop (DLL), simplifying the circuit design and reducing complexity.

Benefits of this technology:

  • The programmable gated ring oscillator allows for flexibility in adjusting the reference clock frequency.
  • The integrated circuit provides accurate timing synchronization without the need for additional components like a DLL.
  • It offers a simplified circuit design, reducing complexity and potentially lowering manufacturing costs.


Original Abstract Submitted

an integrated circuit that includes a generating circuit is described. during operation, the generating circuit may provide an edge clock having a target phase within a clock period of an input clock, where the generating circuit does not include a delay-locked loop (dll). for example, the generating circuit may include a gated ring oscillator that provides a reference clock having a first fundamental frequency that is larger than a second fundamental frequency of the input clock. note that the gated ring oscillator may be programmable to adjust the first fundamental frequency within a predefined range of values. moreover, the generating circuit may include a control circuit that determines a reference count of a number of edges of the reference clock within a reference period of the reference clock.

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