20240030117. MULTI-LEVEL 3D STACKED PACKAGE AND METHODS OF FORMING THE SAME simplified abstract (Qorvo US, Inc.)

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MULTI-LEVEL 3D STACKED PACKAGE AND METHODS OF FORMING THE SAME

Organization Name

Qorvo US, Inc.

Inventor(s)

Julio C. Costa of Oak Ridge NC (US)

George Maxim of Saratoga CA (US)

Baker Scott of San Jose CA (US)

MULTI-LEVEL 3D STACKED PACKAGE AND METHODS OF FORMING THE SAME - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240030117 titled 'MULTI-LEVEL 3D STACKED PACKAGE AND METHODS OF FORMING THE SAME

Simplified Explanation

The present disclosure is about a multi-level three-dimensional (3D) package that consists of multiple vertically stacked package levels. Each package level includes a redistribution structure and a die section placed over the redistribution structure. The die section contains a thinned die with minimal silicon substrate and a thickness ranging from a few micrometers to several tens of micrometers. It also includes a mold compound and an intermediary mold compound.

  • The thinned die and mold compound are deposited over the redistribution structure.
  • The mold compound surrounds the thinned die and extends vertically beyond its top surface, creating an opening over the thinned die within the mold compound.
  • The intermediary mold compound resides over the thinned die and fills the opening within the inner mold compound.
  • The top surface of the intermediary mold compound and the mold compound are coplanar.

Potential applications of this technology:

  • Integrated circuits and electronic devices that require compact packaging.
  • High-density packaging for mobile devices, such as smartphones and tablets.
  • Miniaturized electronic components for wearable devices and IoT devices.

Problems solved by this technology:

  • Enables the creation of multi-level 3D packages with vertically stacked package levels, increasing packaging density.
  • Provides a solution for packaging thinned dies with minimal silicon substrate, reducing the overall package thickness.
  • Ensures proper encapsulation and protection of the thinned die within the mold compound.

Benefits of this technology:

  • Increased packaging density allows for more functionality in a smaller form factor.
  • Thinned dies with minimal silicon substrate reduce the overall package thickness, enabling thinner and lighter electronic devices.
  • Proper encapsulation and protection of the thinned die ensure reliability and longevity of the packaged components.


Original Abstract Submitted

the present disclosure relates to a multi-level three-dimensional (3d) package with multiple package levels vertically stacked. each package level includes a redistribution structure and a die section over the redistribution structure. each die section includes a thinned die that includes substantially no silicon substrate and has a thickness between several micrometers and several tens of micrometers, a mold compound, and an intermediary mold compound. herein, the thinned die and the mold compound are deposed over the redistribution structure, the mold compound surrounds the thinned die and extends vertically beyond a top surface of the thinned die to define an opening over the thinned die and within the mold compound, the intermediary mold compound resides over the thinned die and fills the opening within the inner mold compound, such that a top surface of the intermediary mold compound and a top surface of the mold compound are coplanar.

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