20240023316. SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME simplified abstract (NANYA TECHNOLOGY CORPORATION)
Contents
SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME
Organization Name
Inventor(s)
SZU-YAO Chang of NEW TAIPEI CITY (TW)
SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240023316 titled 'SEMICONDUCTOR STRUCTURE AND METHOD OF MANUFACTURING THE SAME
Simplified Explanation
The abstract of the patent application describes a semiconductor structure and a method of manufacturing it. The structure includes a substrate, an upper structure, a vertical transistor, and an electrical pad. The upper structure is placed on the substrate and has a hole. The vertical transistor is positioned in the hole, and the electrical pad is placed in the hole and on top of the vertical transistor. The top surface of the electrical pad is aligned with the topmost surface of the upper structure.
- The semiconductor structure includes a substrate, upper structure, vertical transistor, and electrical pad.
- The upper structure is placed on the substrate and has a hole.
- The vertical transistor is positioned in the hole of the upper structure.
- The electrical pad is placed in the hole and on top of the vertical transistor.
- The top surface of the electrical pad is aligned with the topmost surface of the upper structure.
Potential applications of this technology:
- Semiconductor manufacturing industry
- Electronics industry
- Integrated circuit production
Problems solved by this technology:
- Efficient integration of vertical transistors into semiconductor structures
- Alignment of electrical pads with the upper structure
Benefits of this technology:
- Improved performance and functionality of semiconductor structures
- Enhanced integration of components in electronic devices
- Streamlined manufacturing process for semiconductor structures
Original Abstract Submitted
a semiconductor structure and a method of manufacturing a semiconductor structure are provided. the semiconductor structure includes a substrate, an upper structure, a vertical transistor an electrical pad. the upper structure is disposed on the substrate and defines a hole. the vertical transistor is disposed in the hole. the electrical pad is disposed in the hole and on the vertical transistor. a top surface of the electrical pad is substantially aligned with a topmost surface of the upper structure.