20240021621. INTEGRATED CIRCUIT STRUCTURE WITH CELLS HAVING ASYMMETRIC POWER RAIL simplified abstract (GlobalFoundries U.S. Inc.)

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INTEGRATED CIRCUIT STRUCTURE WITH CELLS HAVING ASYMMETRIC POWER RAIL

Organization Name

GlobalFoundries U.S. Inc.

Inventor(s)

James P. Mazza of Saratoga Springs NY (US)

Xuelian Zhu of Sunnyvale CA (US)

Jia Zeng, Jr. of Sunnyvale CA (US)

Navneet Jain of Milpitas CA (US)

Mahbub Rashed of Cupertino CA (US)

INTEGRATED CIRCUIT STRUCTURE WITH CELLS HAVING ASYMMETRIC POWER RAIL - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240021621 titled 'INTEGRATED CIRCUIT STRUCTURE WITH CELLS HAVING ASYMMETRIC POWER RAIL

Simplified Explanation

The abstract of this patent application describes an integrated circuit structure that includes multiple rows of cells, with each row containing multiple standard cells. The power rail for at least one pair of adjacent cell rows is asymmetric, meaning it is not symmetrical relative to the cell boundary between the adjacent cells of the pair. The standard cell also includes transistors at a device layer and an isolation area at the edge of the device layer that defines the cell boundary. The power rail within the cell boundary and outside the cell boundary has different heights, creating an asymmetric power rail across the cell boundary. This allows for seamless integration of cell libraries with different heights.

  • The integrated circuit structure includes multiple rows of cells.
  • Each row contains multiple standard cells.
  • The power rail for at least one pair of adjacent cell rows is asymmetric relative to the cell boundary between the adjacent cells.
  • The standard cell includes transistors at a device layer.
  • The standard cell also includes an isolation area at the edge of the device layer that defines the cell boundary.
  • The power rail within the cell boundary and outside the cell boundary has different heights.
  • The asymmetric power rail allows for seamless integration of cell libraries with different heights.

Potential applications of this technology:

  • Integrated circuit design and manufacturing
  • Semiconductor industry
  • Electronics manufacturing

Problems solved by this technology:

  • Integration of cell libraries with different heights
  • Seamless integration of power rails in an integrated circuit structure

Benefits of this technology:

  • Improved integration of different cell libraries
  • Enhanced efficiency in integrated circuit design and manufacturing
  • Increased flexibility in power rail design


Original Abstract Submitted

an integrated circuit (ic) structure includes a plurality of cell rows with each cell row including a plurality of (standard) cells. a power rail for at least one pair of adjacent cell rows is asymmetric relative to a cell boundary between adjacent cells of the at least one pair of adjacent cell rows. embodiments of the disclosure can also include the standard cell including a plurality of transistors at a device layer, and at least a portion of an isolation area at an edge of the device layer defining a cell boundary. the standard cell also includes the power rail including a first portion within the cell boundary and a second portion outside the cell boundary. the first portion and the second portion have different heights such that the power rail is asymmetric across the cell boundary. the asymmetric power rail provides seamless integration of cell libraries having different heights.