20240020455. SOFTWARE-DEFINED WAFER-LEVEL SWITCHING SYSTEM DESIGN METHOD AND APPARATUS simplified abstract (ZHEJIANG LAB)
Contents
SOFTWARE-DEFINED WAFER-LEVEL SWITCHING SYSTEM DESIGN METHOD AND APPARATUS
Organization Name
Inventor(s)
Zhiquan Wan of Hangzhou City (CN)
Shunbin Li of Hangzhou City (CN)
Ruyun Zhang of Hangzhou City (CN)
Weihao Wang of Hangzhou City (CN)
Qingwen Deng of Hangzhou City (CN)
SOFTWARE-DEFINED WAFER-LEVEL SWITCHING SYSTEM DESIGN METHOD AND APPARATUS - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240020455 titled 'SOFTWARE-DEFINED WAFER-LEVEL SWITCHING SYSTEM DESIGN METHOD AND APPARATUS
Simplified Explanation
The present disclosure is about software-defined methods and apparatuses for designing a wafer-level switching system. The patent application describes the following steps and aspects of the invention:
- Determining layout constraints for the wafer-level switching system.
- Constructing a target wafer-level switching system and determining its parameters.
- Designing a logical topology for the switching network.
- Designing the layout of the switching chiplets on the wafer substrate.
- Designing interface structures for external and internal chiplets.
- Configuring the switching mode and enable state of each port of the switching chiplets.
- Ending the process when the target logical topology can be achieved by the wafer-level switching system. Otherwise, reconstructing the logical topology and mapping it to the substrate.
Potential applications of this technology:
- Data centers: The wafer-level switching system can be used in data centers to improve network performance and scalability.
- Telecommunications: It can be applied in telecommunications networks to enhance the efficiency and flexibility of switching systems.
- Internet of Things (IoT): The technology can be utilized in IoT networks to enable efficient communication between devices.
Problems solved by this technology:
- Complex network design: The software-defined methods simplify the process of designing a wafer-level switching system, reducing complexity and improving efficiency.
- Scalability: The technology allows for the design of large-scale switching systems that can handle increasing network demands.
- Flexibility: The software-defined approach enables easy reconfiguration and adaptation of the switching system to different network requirements.
Benefits of this technology:
- Improved network performance: The design optimization and logical topology mapping enhance the performance and efficiency of the switching system.
- Cost-effective: The software-defined methods reduce design complexity and enable efficient use of resources, resulting in cost savings.
- Scalability and flexibility: The technology allows for easy scalability and reconfiguration of the switching system to adapt to changing network needs.
Original Abstract Submitted
the present disclosure relates to software-defined methods and apparatuses for designing a wafer-level switching system, including: determining wafer-level switching system layout constraints; constructing a target wafer-level switching system and determining parameters, and designing a logical topology of a switching network; designing a layout of the switching chiplets on the wafer substrate; respectively designing interface structures of external chiplets and internal chiplets; configuring a switching mode and an enable state of each port of the switching chiplets; ending the process when the target logical topology can be achieved by the wafer-level switching system; otherwise, reconstructing a logical topology of a switching network and mapping it to the substrate.
