20240020239. ARTIFICIAL INTELLIGENCE (AI)/MACHINE LEARNING (ML) TENSOR PROCESSOR simplified abstract (SYNOPSYS, INC.)

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ARTIFICIAL INTELLIGENCE (AI)/MACHINE LEARNING (ML) TENSOR PROCESSOR

Organization Name

SYNOPSYS, INC.

Inventor(s)

Johannes Boonstra of Deurne (NL)

ARTIFICIAL INTELLIGENCE (AI)/MACHINE LEARNING (ML) TENSOR PROCESSOR - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240020239 titled 'ARTIFICIAL INTELLIGENCE (AI)/MACHINE LEARNING (ML) TENSOR PROCESSOR

Simplified Explanation

The patent application describes a system for executing tensor operations, which includes a programmable tensor processor and a memory connected to the processor. The programmable tensor processor consists of load agu circuits that generate addresses and read input tensor operands from the memory. It also includes a datapath circuit that performs tensor operations on the input tensor operands based on instructions received. These instructions are determined by a loop iteration count and loop body micro-code instructions, which define the loop body of a tensor program stored in the memory. The programmable tensor processor also has a store agu circuit that generates addresses and writes the output tensor operands to the memory.

  • The system includes a programmable tensor processor.
  • The programmable tensor processor has load agu circuits to generate addresses and read input tensor operands from the memory.
  • The programmable tensor processor has a datapath circuit to perform tensor operations on the input tensor operands based on instructions received.
  • The instructions are determined by a loop iteration count and loop body micro-code instructions.
  • The loop body micro-code instructions define the loop body of a tensor program stored in the memory.
  • The programmable tensor processor has a store agu circuit to generate addresses and write the output tensor operands to the memory.

Potential applications of this technology:

  • Deep learning: The system can be used for executing tensor operations in deep learning algorithms, which require complex computations on large datasets.
  • Image and video processing: The system can be utilized for performing tensor operations in image and video processing tasks, such as object recognition and video analysis.
  • Natural language processing: This technology can be applied in natural language processing tasks, such as language translation and sentiment analysis, which involve processing large amounts of textual data.

Problems solved by this technology:

  • Efficient tensor operations: The system provides a programmable tensor processor that can efficiently perform tensor operations, enabling faster and more accurate computations.
  • Memory management: The system includes load and store agu circuits that handle memory access, ensuring proper retrieval and storage of tensor operands.
  • Loop execution: The loop iteration count and loop body micro-code instructions allow for the execution of repetitive tensor operations, improving efficiency and reducing the need for manual coding.

Benefits of this technology:

  • Improved performance: The programmable tensor processor and optimized memory access enable faster and more efficient execution of tensor operations, leading to improved overall system performance.
  • Flexibility: The programmable nature of the tensor processor allows for customization and adaptation to different tensor operations and algorithms.
  • Simplified programming: The use of loop iteration count and loop body micro-code instructions simplifies the programming process for tensor operations, reducing the complexity and time required for implementation.


Original Abstract Submitted

a system for executing tensor operations including: a programmable tensor processor; and a memory coupled to the programmable tensor processor, wherein the programmable tensor processor includes: one or more load agu circuits to generate a first sequence of addresses and read input tensor operands from the memory based on the first sequence of addresses; a datapath circuit to perform the tensor operations on the input tensor operands based on receiving one or more instructions to determine output tensor operands, the one or more instructions being based on a loop iteration count and loop body micro-code instructions defining a loop body of a tensor program stored in the memory, the loop body micro-code instructions being executed in the programmable tensor processor; and a store agu circuit configured to generate a second sequence of addresses and write the output tensor operands to the memory based on the second sequence of addresses.

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