20240014953. METHOD FOR ESTIMATING BIT ERROR PROBABILITY USING ERROR RATE RATIO OF FRAME SYNCHRONIZATION WORD simplified abstract (KOREA AEROSPACE RESEARCH INSTITUTE)

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METHOD FOR ESTIMATING BIT ERROR PROBABILITY USING ERROR RATE RATIO OF FRAME SYNCHRONIZATION WORD

Organization Name

KOREA AEROSPACE RESEARCH INSTITUTE

Inventor(s)

Seokkwon Kim of Daejeon (KR)

Sung Wan Kim of Daejeon (KR)

Keunsu Ma of Daejeon (KR)

METHOD FOR ESTIMATING BIT ERROR PROBABILITY USING ERROR RATE RATIO OF FRAME SYNCHRONIZATION WORD - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240014953 titled 'METHOD FOR ESTIMATING BIT ERROR PROBABILITY USING ERROR RATE RATIO OF FRAME SYNCHRONIZATION WORD

Simplified Explanation

The present invention is a method for estimating the probability of bit errors in a communication system. The method uses the error rate ratio of a frame synchronization word to simplify the computational complexity, allowing for a relatively simple and economical implementation at a high computational speed.

  • The method involves defining error rate ratios of frame synchronization words.
  • A weighted least squares cost function is set with weights greater than or equal to 0, using the error rate ratios of the frame synchronization words.
  • An estimated bit error probability value is obtained by minimizing the cost function.
  • Sequentially obtaining the weights ensures that the mean squared error of the estimated bit error probability value becomes small.

Potential applications of this technology:

  • Communication systems: The method can be applied in various communication systems, such as wireless networks, satellite communication, and optical communication, to estimate the probability of bit errors.
  • Error correction: The estimated bit error probability can be used to optimize error correction techniques, improving the overall reliability and performance of the communication system.

Problems solved by this technology:

  • Computational complexity: The method reduces the computational complexity involved in estimating the bit error probability, making it feasible to implement in simpler and more cost-effective systems.
  • Speed: The method allows for high computational speed, enabling real-time estimation of bit error probabilities in fast-paced communication systems.

Benefits of this technology:

  • Simplified implementation: The method provides a relatively simple and economical way to estimate bit error probabilities, making it accessible to a wider range of communication systems.
  • Improved reliability: Accurate estimation of bit error probabilities allows for better optimization of error correction techniques, leading to improved reliability and performance of communication systems.
  • Real-time estimation: The high computational speed of the method enables real-time estimation of bit error probabilities, facilitating timely decision-making and adjustments in communication systems.


Original Abstract Submitted

the present invention relates to a method for estimating a bit error probability using an error rate ratio of a frame synchronization word, to lower computational complexity such that the method can be implemented in a relatively simple and economical way at a high computational speed. the method includes the steps of: a) defining error rate ratios of frame synchronization words; b) setting a weighted least squares cost function with weights greater than or equal to 0 for the bit error probability using the error rate ratios of the frame synchronization words set in the step a); c) obtaining an estimated bit error probability value that minimizes the cost function set in the step b); and d) sequentially obtaining the weights so that a mean squared error of the estimated bit error probability value obtained in the step c) becomes small.