20240014270. INSULATED-GATE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME simplified abstract (FUJI ELECTRIC CO., LTD.)
Contents
INSULATED-GATE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
Organization Name
Inventor(s)
Keiji Okumura of Matsumoto (JP)
INSULATED-GATE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A simplified explanation of the abstract
This abstract first appeared for US patent application 20240014270 titled 'INSULATED-GATE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
Simplified Explanation
The abstract describes an insulated-gate semiconductor device with trenches arranged in a chip structure. The trenches define sidewalls in a first and second sidewall surface facing each other. The device includes a first unit cell with a main-electrode region in contact with the first sidewall surface of a first trench, a base region in contact with the bottom surface of the main-electrode region and the first sidewall surface, a drift layer in contact with the bottom surface of the base region and the first sidewall surface, and a gate protection-region in contact with the second sidewall surface and the bottom surface of the first trench. It also includes a second unit cell with an operation suppression region in contact with the first and second sidewall surfaces of a second trench, located at one end of an array of the trenches.
- The device is an insulated-gate semiconductor device with trenches arranged in a chip structure.
- The trenches define sidewalls in a first and second sidewall surface facing each other.
- The first unit cell includes a main-electrode region, a base region, a drift layer, and a gate protection-region.
- The second unit cell includes an operation suppression region.
- The second unit cell is located at one end of an array of the trenches.
Potential applications of this technology:
- Power electronics
- Integrated circuits
- Switching devices
Problems solved by this technology:
- Improved power efficiency
- Enhanced performance of semiconductor devices
- Reduction in size and cost of devices
Benefits of this technology:
- Higher power density
- Improved thermal management
- Increased reliability and durability
Original Abstract Submitted
an insulated-gate semiconductor device, which has trenches arranged in a chip structure, the trenches defining both sidewalls in a first and second sidewall surface facing each other, includes: a first unit cell including a main-electrode region in contact with a first sidewall surface of a first trench, a base region in contact with a bottom surface of the main-electrode region and the first sidewall surface, a drift layer in contact with a bottom surface of the base region and the first sidewall surface, and a gate protection-region in contact with the second sidewall surface and a bottom surface of the first trench; and a second unit cell including an operation suppression region in contact with a first sidewall surface and a second sidewall surface of a second trench, wherein the second unit cell includes the second trench located at one end of an array of the trenches.
