20240014255. METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR DEVICE, AND MANUFACTURING METHOD THEREFOR simplified abstract (LG ELECTRONICS INC.)

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METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR DEVICE, AND MANUFACTURING METHOD THEREFOR

Organization Name

LG ELECTRONICS INC.

Inventor(s)

Seung Yup Jang of Seoul (KR)

Jaemoo Kim of Seoul (KR)

Hojung Lee of Seoul (KR)

METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR DEVICE, AND MANUFACTURING METHOD THEREFOR - A simplified explanation of the abstract

This abstract first appeared for US patent application 20240014255 titled 'METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR DEVICE, AND MANUFACTURING METHOD THEREFOR

Simplified Explanation

The present disclosure relates to a MOSFET device that is made from silicon carbide and a manufacturing method for the same. Specifically, it relates to a metal-oxide-semiconductor field-effect transistor (MOSFET) device that includes a drain electrode, a substrate, an n-type drift layer, a first current spreading layer, p-type wells, a second current spreading layer, a gate oxide layer, and a source electrode.

  • The MOSFET device is made from silicon carbide, which is a semiconductor material known for its high temperature and high voltage capabilities.
  • The device includes a drain electrode, which is the terminal through which current flows out of the device.
  • The substrate is located on the drain electrode and provides a foundation for the device.
  • The n-type drift layer is located on the substrate and helps in controlling the flow of current.
  • The first current spreading layer is located on the drift layer and has a specific doping concentration to spread the current evenly.
  • The p-type wells are located on the first current spreading layer and define a channel for current flow.
  • The second current spreading layer is located between the wells and has a higher doping concentration than the first current spreading layer.
  • The gate oxide layer is located on the second current spreading layer and the wells, providing insulation between the gate electrode and the channel.
  • The source electrode is located on the gate oxide layer and serves as the terminal through which current flows into the device.

Potential applications of this technology:

  • Power electronics: The MOSFET device made from silicon carbide can handle high voltages and temperatures, making it suitable for power electronics applications such as electric vehicles, renewable energy systems, and industrial machinery.
  • Aerospace and defense: The high temperature and high voltage capabilities of the device make it suitable for aerospace and defense applications where reliability and performance under extreme conditions are crucial.

Problems solved by this technology:

  • High temperature operation: The MOSFET device made from silicon carbide can operate at higher temperatures compared to traditional silicon-based devices, solving the problem of thermal limitations in certain applications.
  • High voltage handling: The device can handle higher voltages, allowing for more efficient power conversion and transmission.

Benefits of this technology:

  • Improved efficiency: The use of silicon carbide in the MOSFET device results in lower power losses and higher efficiency compared to traditional silicon-based devices.
  • Higher power density: The device can handle higher power levels in a smaller form factor, enabling compact and lightweight designs.
  • Enhanced reliability: The device's ability to operate at high temperatures and handle high voltages improves its reliability and lifespan in demanding applications.


Original Abstract Submitted

the present disclosure relates to: a mosfet device that is applicable to a semiconductor device and, particularly, is manufactured from silicon carbide; and a manufacturing method therefor. the present disclosure relates to a metal-oxide-semiconductor field-effect transistor device capable of comprising: a drain electrode; a substrate located on the drain electrode; an n-type drift layer located on the substrate; a first current spreading layer which is located on the drift layer and which has a first doping concentration; p-type wells located on the first current spreading layer, and spaced from each other so as to define a channel; a second current spreading layer which is located between the wells and which has a second doping concentration that is higher than the first doping concentration; a gate oxide layer located on the second current spreading layer and the wells; and a source electrode located on the gate oxide layer.