18545888. ENHANCED GRADIENT SEEDING SCHEME DURING A PROGRAM OPERATION IN A MEMORY SUB-SYSTEM simplified abstract (Micron Technology, Inc.)

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ENHANCED GRADIENT SEEDING SCHEME DURING A PROGRAM OPERATION IN A MEMORY SUB-SYSTEM

Organization Name

Micron Technology, Inc.

Inventor(s)

Vinh Q. Diep of Hayward CA (US)

Ching-Huang Lu of Fremont CA (US)

Yingda Dong of Los Altos CA (US)

ENHANCED GRADIENT SEEDING SCHEME DURING A PROGRAM OPERATION IN A MEMORY SUB-SYSTEM - A simplified explanation of the abstract

This abstract first appeared for US patent application 18545888 titled 'ENHANCED GRADIENT SEEDING SCHEME DURING A PROGRAM OPERATION IN A MEMORY SUB-SYSTEM

Simplified Explanation

The control logic in a memory device initiates a program operation on a memory array, including a seeding phase where a seeding voltage is applied to a string of memory cells in a data block. During this phase, a first positive voltage is applied to a first plurality of word lines in the data block, with each word line connected to a corresponding memory cell in the string of memory cells. Additionally, a second positive voltage, lower than the first, is applied to one or more second word lines coupled to second memory cells on the source-side of the first plurality of memory cells.

  • Control logic initiates program operation on memory array
  • Seeding phase involves applying seeding voltage to memory cells in data block
  • First positive voltage applied to first plurality of word lines in data block
  • Second positive voltage applied to second word lines on source-side of memory cells
  • Second positive voltage is lower than the first positive voltage

Potential Applications

This technology could be applied in:

  • Solid-state drives
  • Embedded systems
  • Wearable devices

Problems Solved

This technology helps in:

  • Improving memory cell programming efficiency
  • Enhancing data storage reliability

Benefits

The benefits of this technology include:

  • Faster program operation initiation
  • Reduced power consumption
  • Enhanced memory array performance

Potential Commercial Applications

The potential commercial applications of this technology include:

  • Memory device manufacturing
  • Data storage solutions
  • Consumer electronics industry

Possible Prior Art

One possible prior art related to this technology is the use of multi-level cell (MLC) memory technology in solid-state drives to increase data storage capacity.

What is the specific voltage range used in the seeding phase of the program operation?

The specific voltage range used in the seeding phase is not mentioned in the abstract.

How does the control logic determine the sequence of applying voltages to the word lines during the program operation?

The abstract does not provide details on how the control logic determines the sequence of applying voltages to the word lines during the program operation.


Original Abstract Submitted

Control logic in a memory device initiates a program operation on a memory array, the program operation comprising a seeding phase. During the seeding phase, the control logic causes a seeding voltage to be applied to a string of memory cells in a data block of the memory array during the seeding phase of the program operation and causes a first positive voltage to be applied to a first plurality of word lines of the data block during the seeding phase, wherein each of the first plurality of word lines is coupled to a corresponding memory cell of a first plurality of memory cells in the string of memory cells, the first plurality of word lines comprising a selected word line associated with the program operation. The control logic further causes a second positive voltage to be applied to one or more second word lines coupled to one or more second memory cells on a source-side of the first plurality of memory cells in the string of memory cells during the seeding phase, wherein the second positive voltage is less than the first positive voltage.