18542769. VERTICAL MEMORY DEVICE simplified abstract (SK hynix Inc.)

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VERTICAL MEMORY DEVICE

Organization Name

SK hynix Inc.

Inventor(s)

Seung-Hwan Kim of Seoul (KR)

Su-Ock Chung of Seoul (KR)

Seon-Yong Cha of Chungcheongbuk-do (KR)

VERTICAL MEMORY DEVICE - A simplified explanation of the abstract

This abstract first appeared for US patent application 18542769 titled 'VERTICAL MEMORY DEVICE

Simplified Explanation

The memory device described in the abstract consists of two memory cell mats with multi-layer level sub word lines, each mat having a sub word line driver circuit positioned underneath it. The first memory cell mat is positioned over a substrate, while the second memory cell mat is laterally spaced apart from the first mat.

  • The memory device includes a first memory cell mat with first multi-layer level sub word lines.
  • The device also includes a second memory cell mat with second multi-layer level sub word lines.
  • A first sub word line driver circuit is positioned underneath the first memory cell mat.
  • A second sub word line driver circuit is positioned underneath the second memory cell mat.
  • The first sub word line driver circuit is positioned underneath ends of the first multi-layer level sub word lines.
  • The second sub word line driver circuit is positioned underneath ends of the second multi-layer level sub word lines.

Potential Applications

This technology could be applied in:

  • High-speed data storage devices
  • Advanced computing systems

Problems Solved

This technology helps in:

  • Increasing memory cell efficiency
  • Enhancing data processing speed

Benefits

The benefits of this technology include:

  • Improved memory cell performance
  • Enhanced overall system reliability

Potential Commercial Applications

A potential commercial application for this technology could be in:

  • Next-generation solid-state drives (SSDs)

Possible Prior Art

One possible prior art for this technology could be:

  • Multi-layer sub word line memory devices

Unanswered Questions

How does this technology compare to existing memory cell designs?

This article does not provide a direct comparison to existing memory cell designs, leaving the reader to wonder about the specific advantages of this new technology.

What are the specific technical specifications of the sub word line driver circuits?

The article does not delve into the technical specifications of the sub word line driver circuits, leaving the reader curious about the intricacies of this aspect of the technology.


Original Abstract Submitted

A memory device includes: a first memory cell mat that includes first multi-layer level sub word lines positioned over a substrate; a second memory cell mat that is laterally spaced apart from the first memory cell mat and includes second multi-layer level sub word lines; a first sub word line driver circuit that is positioned underneath the first memory cell mat; and a second sub word line driver circuit that is positioned underneath the second memory cell mat, wherein the first sub word line driver circuit is positioned underneath ends of the first multi-layer level sub word lines, and the second sub word line driver circuit is positioned underneath ends of the second multi-layer level sub word lines.