18542381. PACKAGED INTEGRATED CIRCUIT HAVING PACKAGE SUBSTRATE WITH INTEGRATED ISOLATION CIRCUIT simplified abstract (Texas Instruments Incorporated)
Contents
- 1 PACKAGED INTEGRATED CIRCUIT HAVING PACKAGE SUBSTRATE WITH INTEGRATED ISOLATION CIRCUIT
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 PACKAGED INTEGRATED CIRCUIT HAVING PACKAGE SUBSTRATE WITH INTEGRATED ISOLATION CIRCUIT - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Original Abstract Submitted
PACKAGED INTEGRATED CIRCUIT HAVING PACKAGE SUBSTRATE WITH INTEGRATED ISOLATION CIRCUIT
Organization Name
Texas Instruments Incorporated
Inventor(s)
Giacomo Calabrese of Freising (DE)
Nicola Bertoni of Freising (DE)
PACKAGED INTEGRATED CIRCUIT HAVING PACKAGE SUBSTRATE WITH INTEGRATED ISOLATION CIRCUIT - A simplified explanation of the abstract
This abstract first appeared for US patent application 18542381 titled 'PACKAGED INTEGRATED CIRCUIT HAVING PACKAGE SUBSTRATE WITH INTEGRATED ISOLATION CIRCUIT
Simplified Explanation
The patent application describes a package substrate with multiple metal layers, isolation material, isolation circuit, and contact pads for coupling to integrated circuits.
- The package substrate includes a first metal layer and a second metal layer.
- The isolation material contains the first and second metal layers, along with the isolation circuit.
- The isolation circuit consists of a first circuit element in the first metal layer and a second circuit element in the second metal layer, electrically isolated by the isolation material.
- The first plurality of contact pads is connected to a first integrated circuit on the substrate, with a contact pad linked to the first circuit element.
- The second plurality of contact pads is connected to a second integrated circuit on the substrate, with a contact pad linked to the second circuit element.
Potential Applications
The technology described in the patent application could be applied in the manufacturing of advanced electronic devices, such as smartphones, tablets, and computers.
Problems Solved
This technology helps in improving the electrical connectivity and isolation within package substrates, enhancing the overall performance and reliability of integrated circuits.
Benefits
The benefits of this technology include increased efficiency, reduced signal interference, and improved signal integrity in electronic devices.
Potential Commercial Applications
The technology could find applications in the semiconductor industry for the production of high-performance integrated circuits and electronic devices.
Possible Prior Art
One possible prior art could be the use of multi-layer substrates in electronic packaging to enhance electrical connectivity and isolation.
Unanswered Questions
How does this technology impact the overall cost of manufacturing electronic devices?
The cost implications of implementing this technology in electronic device manufacturing are not addressed in the patent application.
What are the environmental implications of using such advanced package substrates in electronic devices?
The environmental impact of utilizing these advanced package substrates in electronic devices is not discussed in the patent application.
Original Abstract Submitted
A package substrate includes a first metal layer, a second metal layer, isolation material containing the first and second metal layers, an isolation circuit, a first plurality of contact pads, and a second plurality of contact pads. The isolation circuit includes a first circuit element in the first metal layer and a second circuit element in the second metal layer and electrically isolated from the first circuit element by the isolation material. The first plurality of contact pads is adapted to be coupled to a first integrated circuit on the package substrate and includes a first contact pad coupled to the first circuit element. The second plurality of contact pads is adapted to be coupled to a second integrated circuit on the package substrate and includes a second contact pad coupled to the second circuit element.