18534430. TECHNIQUES FOR DUTY CYCLE CORRECTION simplified abstract (Intel Corporation)
Contents
- 1 TECHNIQUES FOR DUTY CYCLE CORRECTION
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 TECHNIQUES FOR DUTY CYCLE CORRECTION - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Original Abstract Submitted
TECHNIQUES FOR DUTY CYCLE CORRECTION
Organization Name
Inventor(s)
Christopher P. Mozak of Portland OR (US)
Ralph S. Li of Portland OR (US)
Chin Wah Lim of Bayan Lepas (MY)
Mahmoud Elassal of King City OR (US)
Anant Balakrishnan of Hillsboro OR (US)
TECHNIQUES FOR DUTY CYCLE CORRECTION - A simplified explanation of the abstract
This abstract first appeared for US patent application 18534430 titled 'TECHNIQUES FOR DUTY CYCLE CORRECTION
Simplified Explanation
The patent application describes a technique for measuring and adjusting the duty cycle of a clock signal using a sample clock based on a prime number ratio of a reference clock frequency.
- Using a sample clock to measure a duty cycle by periodic sampling a target clock signal
- Setting a measurement cycle time based on a reference clock frequency
- Determining the magnitude of a duty cycle error compared to a target duty cycle
- Adjusting the duty cycle based on the magnitude of the duty cycle error
Potential Applications
This technology could be applied in various industries where precise timing and synchronization of clock signals are crucial, such as telecommunications, networking, and instrumentation.
Problems Solved
This technology solves the problem of accurately measuring and adjusting the duty cycle of clock signals, ensuring optimal performance and reliability in electronic systems.
Benefits
The benefits of this technology include improved accuracy in duty cycle measurements, enhanced synchronization of clock signals, and increased overall system performance.
Potential Commercial Applications
Potential commercial applications of this technology include high-frequency trading systems, data communication networks, and test and measurement equipment.
Possible Prior Art
One possible prior art could be techniques for measuring duty cycles using phase-locked loops or digital signal processing algorithms.
Unanswered Questions
What are the specific industries that could benefit the most from this technology?
Industries such as telecommunications, networking, and instrumentation could benefit the most from this technology due to their reliance on precise timing and synchronization of clock signals.
How does this technology compare to existing methods for measuring and adjusting duty cycles of clock signals?
This technology offers a unique approach by using a sample clock based on a prime number ratio of a reference clock frequency, which may provide more accurate and efficient results compared to traditional methods.
Original Abstract Submitted
Examples may include techniques for using a sample clock to measure a duty cycle by periodic sampling a target clock signal based on a prime number ratio of a reference clock frequency. The reference clock frequency used to set a measurement cycle time over which the duty cycle is to be measured. A magnitude of a duty cycle error as compared to a programmable target duty cycle is determined based on the measured duty cycle and the duty cycle is adjusted based, at least in part, on the magnitude of the duty cycle error.
