18528086. RESISTIVE AND DIGITAL PROCESSING CORES simplified abstract (HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP)

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RESISTIVE AND DIGITAL PROCESSING CORES

Organization Name

HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

Inventor(s)

John Paul Strachan of San Carlos CA (US)

Dejan S. Milojicic of Palo Alto CA (US)

Martin Foltin of Fort Collins CO (US)

Sai Rahul Chalamalasetti of Milpitas CA (US)

Amit S. Sharma of Milpitas CA (US)

RESISTIVE AND DIGITAL PROCESSING CORES - A simplified explanation of the abstract

This abstract first appeared for US patent application 18528086 titled 'RESISTIVE AND DIGITAL PROCESSING CORES

Simplified Explanation

The abstract describes a device that includes both a resistive memory array for analog computation and a digital processing core for digital computation, controlled by a controller to selectively apply input data to each core.

  • The device includes a first processing core with a resistive memory array for analog computation.
  • The device also includes a digital processing core with a digital memory programmable for different computations.
  • A controller is included to selectively apply input data to the first processing core and the digital processing core.

Potential Applications

This technology could be applied in:

  • Edge computing
  • IoT devices
  • Wearable technology

Problems Solved

This technology helps solve:

  • Efficient computation of analog and digital data
  • Integration of analog and digital processing in a single device

Benefits

The benefits of this technology include:

  • Improved energy efficiency
  • Faster computation speed
  • Enhanced flexibility in processing different types of data

Potential Commercial Applications

Optimized for SEO: "Innovative Applications of Analog-Digital Processing Cores"

  • Smart home devices
  • Medical devices
  • Automotive systems

Possible Prior Art

No prior art is known at this time.

Unanswered Questions

How does this technology compare to traditional computing methods?

This article does not provide a direct comparison between this technology and traditional computing methods. It would be helpful to understand the specific advantages and disadvantages of using this device compared to conventional computing systems.

What are the limitations of this device in terms of scalability and complexity?

The article does not address the scalability and complexity limitations of this device. It would be important to know how well this technology can scale for larger and more complex computational tasks.


Original Abstract Submitted

In some examples, a device includes a first processing core comprising a resistive memory array to perform an analog computation, and a digital processing core comprising a digital memory programmable with different values to perform different computations responsive to respective different conditions. The device further includes a controller to selectively apply input data to the first processing core and the digital processing core.