18525988. HIGH PERFORMANCE MOSFETS HAVING VARYING CHANNEL STRUCTURES simplified abstract (TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.)
Contents
- 1 HIGH PERFORMANCE MOSFETS HAVING VARYING CHANNEL STRUCTURES
- 1.1 Organization Name
- 1.2 Inventor(s)
- 1.3 HIGH PERFORMANCE MOSFETS HAVING VARYING CHANNEL STRUCTURES - A simplified explanation of the abstract
- 1.4 Simplified Explanation
- 1.5 Potential Applications
- 1.6 Problems Solved
- 1.7 Benefits
- 1.8 Potential Commercial Applications
- 1.9 Possible Prior Art
- 1.10 Original Abstract Submitted
HIGH PERFORMANCE MOSFETS HAVING VARYING CHANNEL STRUCTURES
Organization Name
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Inventor(s)
Ching-Wei Tsai of Hsinchu (TW)
Jiun-Jia Huang of Beigang Township (TW)
Kuan-Lun Cheng of Hsinchu (TW)
Chi-Hsing Hsu of New Taipei City (TW)
HIGH PERFORMANCE MOSFETS HAVING VARYING CHANNEL STRUCTURES - A simplified explanation of the abstract
This abstract first appeared for US patent application 18525988 titled 'HIGH PERFORMANCE MOSFETS HAVING VARYING CHANNEL STRUCTURES
Simplified Explanation
The present disclosure describes a method for the formation of gate-all-around nano-sheet FETs with tunable performance. The method involves creating vertical structures with multilayer nano-sheet stacks, disposing a sacrificial gate structure, depositing an isolation layer, etching the sacrificial gate structure, removing second nano-sheet layers, and forming a metal gate structure around the suspended first nano-sheet layers.
- Vertical structures with multilayer nano-sheet stacks
- Sacrificial gate structure
- Isolation layer
- Etching process
- Formation of suspended first nano-sheet layers
- Metal gate structure
Potential Applications
The technology described in this patent application could be applied in the semiconductor industry for the development of advanced field-effect transistors with improved performance and tunability.
Problems Solved
This technology solves the problem of enhancing the performance and tunability of gate-all-around nano-sheet FETs by utilizing a novel method for their formation.
Benefits
The benefits of this technology include increased efficiency, improved control over device performance, and the potential for developing next-generation electronic devices.
Potential Commercial Applications
- Semiconductor manufacturing
- Electronics industry
- Research and development in nanotechnology
Possible Prior Art
One possible prior art for this technology could be the development of gate-all-around FETs with different structures and materials for improved performance and functionality.
Unanswered Questions
How does this technology compare to existing methods for forming nano-sheet FETs?
This article does not provide a direct comparison with existing methods for forming nano-sheet FETs.
What are the specific performance metrics that can be tuned in these gate-all-around nano-sheet FETs?
The article does not specify the exact performance metrics that can be tuned in these gate-all-around nano-sheet FETs.
Original Abstract Submitted
The present disclosure describes a method for the formation of gate-all-around nano-sheet FETs with tunable performance. The method includes disposing a first and a second vertical structure with different widths over a substrate, where the first and the second vertical structures have a top portion comprising a multilayer nano-sheet stack with alternating first and second nano-sheet layers. The method also includes disposing a sacrificial gate structure over the top portion of the first and second vertical structures; depositing an isolation layer over the first and second vertical structures so that the isolation layer surrounds a sidewall of the sacrificial gate structure; etching the sacrificial gate structure to expose each multilayer nano-sheet stack from the first and second vertical structures; removing the second nano-sheet layers from each exposed multilayer nano-sheet stack to form suspended first nano-sheet layers; forming a metal gate structure to surround the suspended first nano-sheet layers.